Microelectromechanical device including an encapsulation layer of which a portion is removed to expose a substantially planar surface having a portion that is disposed outside and above a chamber and including a field region on which integrated circuits are formed, and methods for fabricating same

• US 8,623,686 B2
• Filed: 03/14/2013
• Issued: 01/07/2014
• Est. Priority Date: 06/04/2003
• Status: Active Grant

• Current Assignee: Robert Bosch GmbH
• Original Assignee: Robert Bosch GmbH
• Inventors: Partridge, Aaron, Lutz, Markus, Kronmueller, Silvia
• Primary Examiner(s): Payen, Marvin
• Application Number:
  US13/829,393
• Publication Number:
  US 20130280842A1
• Time in Patent Office: 299 Days
• Field of Search: 257/414, 438/48
• US Class Current: 438/48
• CPC Class Codes: B81B 2207/015 the micromechanical device and the control or processing electronics being integrated on the same substrate
• CPC Class Codes: B81C 1/00261 Processes for packaging MEMS devices MEMS packages B81B7/0032, packaging of smart-MEMS B81C1/0023
• CPC Class Codes: B81C 1/00301 Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
• CPC Class Codes: B81C 2201/0176 Chemical vapour Deposition
• CPC Class Codes: B81C 2203/0136 Growing or depositing of a covering layer
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a MEMS device, and technique of fabricating or manufacturing a MEMS device, having mechanical structures encapsulated in a chamber prior to final packaging. The material that encapsulates the mechanical structures, when deposited, includes one or more of the following attributes: low tensile stress, good step coverage, maintains its integrity when subjected to subsequent processing, does not significantly and/or adversely impact the performance characteristics of the mechanical structures in the chamber (if coated with the material during deposition), and/or facilitates integration with high-performance integrated circuits. In one embodiment, the material that encapsulates the mechanical structures is, for example, silicon (polycrystalline, amorphous or porous, whether doped or undoped), silicon carbide, silicon-germanium, germanium, or gallium-arsenide.

Claims

1. A method of manufacturing a microelectromechanical device, the method comprising:

forming a micromachined mechanical structure on top of a substrate;

providing a sacrificial layer over the micromachined mechanical structure;

disposing a first encapsulation layer over at least a portion of the sacrificial layer, at least a portion of the micromachined mechanical structure, and at least a portion of the substrate;

forming a plurality of vents in the first encapsulation layer;

removing the sacrificial layer through the plurality of vents to release at least a portion of the micromachined mechanical structure, thereby forming a chamber, wherein;

a surface of the first encapsulation layer forms a wall of the chamber,

at least a portion of the micromachined mechanical structure is disposed in the chamber, and

after the sacrificial layer is removed, no intervening layers reside between the micromachined mechanical structure and the first encapsulation layer; and

disposing a second encapsulation layer over the first encapsulation layer to fill the plurality of vents, thereby sealing the chamber, wherein;

no intervening layers reside between the first encapsulation layer and the second encapsulation layer, and

the first encapsulation layer and the second encapsulation layer comprise the same material.

2. The method of claim 1, wherein the micromachined mechanical structure is disposed over the substrate or formed from at least a portion of the substrate.

3. The method of claim 1, wherein the first encapsulation layer comprises a semiconductor material.

4. The method of claim 3, further comprising the step of removing a portion of the second encapsulation layer to expose a substantially planar surface, wherein the substantially planar surface is adapted to provide a base upon which integrated circuits are formed.

5. The method of claim 4, wherein chemical mechanical polishing technique is used to remove the portion of the second encapsulation layer to expose a substantially planar surface.

6. The method of claim 4, wherein a first portion of the substantially planar surface is disposed outside and above the chamber and includes a field region upon which the integrated circuits are formed.

7. The method of claim 6, wherein the field region comprises a monocrystalline semiconductor material.

8. The method of claim 7, wherein the integrated circuits comprise data processing electronics.

9. The method of claim 6, further comprising the step of forming a contact to electrically couple the micromachined mechanical structure to the integrated circuits, interface circuitry, or external devices, wherein the contact is at least partially disposed outside the chamber.

10. The method of claim 9, wherein the contact comprises a semiconductor material, and further comprising the step of doping the semiconductor material of the contact with an impurity to provide increased electrical conductivity.

11. The method of claim 9, further comprising the steps of:

disposing an insulation layer on at least a portion of the second encapsulation layer;

forming an opening in the insulation layer over the contact; and

disposing an electrically conductive material within the opening over the contact and on at least a portion of the insulation layer.

12. The method of claim 1, wherein the first encapsulation layer and the second encapsulation layer comprise polycrystalline silicon, porous polycrystalline silicon, amorphous silicon, germanium, silicon/germanium, silicon carbide, or gallium arsenide.