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Semiconductor device and manufacturing method thereof

  • US 8,624,248 B2
  • Filed: 06/27/2011
  • Issued: 01/07/2014
  • Est. Priority Date: 07/22/1999
  • Status: Expired due to Term
First Claim
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1. A semiconductor device comprising:

  • a first pixel over a substrate, and comprising;

    a first TFT comprising;

    a first portion of a first semiconductor layer comprising a first channel region, a pair of first LDD regions in contact with the first channel region, and first source and drain regions on the outside of the pair of first LDD regions;

    a first portion of a gate insulating film over the first portion of the first semiconductor layer; and

    a first gate electrode over the first portion of the gate insulating film, and formed from a conductive layer,a capacitor comprising;

    a first layer comprising a second portion of the first semiconductor layer;

    a second layer over the first layer, and comprising a second portion of the gate insulating film; and

    a third layer over the second layer, and formed from the conductive layer,an insulating film comprising silicon nitride, and over and in contact with the first gate electrode and the gate insulating film; and

    a first pixel electrode over the insulating film, and electrically connected to the first TFT,wherein the first semiconductor layer is overlapped with a second pixel electrode in a second pixel, andwherein a thickness of the gate insulating film over the first channel region is thicker than a thickness of the gate insulating film over each of the first source and drain regions, anda driver circuit over the substrate, and comprising an n-channel TFT and a p-channel TFT,wherein the n-channel TFT comprises;

    a second semiconductor layer comprising a second channel region, a pair of second LDD regions in contact with the second channel region, and second source and drain regions disposed on the outside of the pair of second LDD regions;

    a third portion of the gate insulating film provided over the second semiconductor layer; and

    a second gate electrode provided over the third portion of the gate insulating film, andwherein a thickness of the gate insulating film over the second channel region is thicker than a thickness of the gate insulating film over each of the second source and drain regions.

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