Circuit and method for determining comparator offsets of electronic devices

• US 8,624,653 B2
• Filed: 06/15/2011
• Issued: 01/07/2014
• Est. Priority Date: 06/15/2011
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Nagda, Miten H., McQuirk, Dale J.
• Primary Examiner(s): Wells, Kenneth B.
• Application Number:
  US13/160,979
• Publication Number:
  US 20120319735A1
• Time in Patent Office: 937 Days
• Field of Search: 327/307, 330/9, 341/154
• US Class Current: 327/307
• CPC Class Codes: G01R 31/31703 Comparison aspects, e.g. signature analysis, comparators concerning scan tests G01R31/318566; concerning testers G01R31/3193

Abstract

A device includes a comparator, and a selection circuit coupled to the inputs of the comparator. The selection circuit receives reference voltages and a variable voltage. In a normal operation mode, the selection circuit provides the variable voltage and a selected reference voltage to the comparator and the comparator provides an indication based on the variable voltage. In a test mode, the selection circuit provides a first selected reference voltage and a second selected reference voltage to the comparator for determining a switching offset voltage of the comparator.

Claims

1. A method for operating a comparator, the method comprising:

in a first mode of operation, providing a first reference voltage of a plurality of reference voltages to a first input of a first comparator, the first comparator including an output to provide an indication of a comparison of a variable voltage received at a second input of the first comparator with the first reference voltage; and

in a second mode of operation,

providing a second reference voltage of the plurality of reference voltages to the first input of the first comparator and providing a third reference voltage of the plurality of reference voltages to the second input of the first comparator, wherein providing the second reference voltage and providing the third reference voltage further comprises selecting successive reference voltages of the plurality of reference voltages to be provided to the first and second inputs of the first comparator; and

measuring a first switching offset voltage of the first comparator based on the second reference voltage and the third reference voltage;

wherein selecting successive reference voltages of the plurality of reference voltages further comprises providing the second reference voltage to the second input of the first comparator and the third reference voltage to the first input of the first comparator prior to providing the second reference voltage to the first input of the first comparator and the third reference voltage to the second input of the first comparator.

2. The method of claim 1, wherein measuring the switching offset voltage of the first comparator further comprises determining a voltage difference between the second reference voltage and the third reference voltage.

3. The method of claim 1, wherein during the first mode of operation, the output of the first comparator drives an input of a voltage regulator to regulate the variable voltage.

4. The method of claim 3, further comprising:

in the second mode of operation, isolating the output of the first comparator from the input of the voltage regulator.

5. The method of claim 1, further comprising in the second mode of operation:

providing the second reference voltage of the plurality of reference voltages to a first input of a second comparator;

providing the third reference voltage of the plurality of reference voltages to a second input of the second comparator; and

measuring a second switching offset voltage of the second comparator based on the second reference voltage and the third reference voltage.

6. The method of claim 1, further comprising in the second mode of operation:

providing the second reference voltage of the plurality of reference voltages to a first input of a second comparator;

providing a fourth reference voltage of the plurality of reference voltages to a second input of the second comparator; and

measuring second switching offset voltage of the second comparator based on the second reference voltage and the fourth reference voltage.

7. The method of claim 1, further comprising in the second mode of operation:

providing a fourth reference voltage of the plurality of reference voltages to a first input of a second comparator;

providing a fifth reference voltage of the plurality of reference voltages to a second input of the second comparator; and

measuring a second switching offset voltage of the second comparator based on the fourth reference voltage and the fifth reference voltage.

8. The method of claim 1, wherein providing the second reference voltage and the third reference voltage is in response to a test routine of a built-in self test processor of an integrated circuit.

9. A method for measuring a switching voltage offset of a comparator, the method comprising:

providing a first reference voltage to a first input of the comparator and a second reference voltage to a second input of the comparator;

detecting that an output of the comparator is in a first state;

providing a third reference voltage to the second input;

responsive to determining that an output of the comparator has changed to a second state, measuring the switching voltage offset of the comparator as a difference in voltage between the first reference voltage and the third reference voltage; and

responsive to determining that the output has remained in the first state;

providing the first reference voltage to the second input and the third reference voltage to the first input; and

responsive to determining that the output is in the second state, measuring the switching voltage offset as the difference in voltage between the third reference voltage and the first reference voltage.

10. The method of claim 9, wherein providing the first reference voltage, the second reference voltage, and the third reference voltage is controlled by a built-in self test processor.

11. The method of claim 9, further comprising:

after providing the first reference voltage to the second input of the comparator and the third reference voltage to the first input of the comparator and responsive to determining that the output has remained in the first state;

providing the first reference voltage to the second input of the comparator and a fourth reference voltage to the first input; and

responsive to determining that the output is in the second state, measuring the switching voltage offset as the difference in voltage between the fourth reference voltage and the first reference voltage.

12. The method of claim 11, further comprising:

after providing the first reference voltage to the second input and the fourth reference voltage to the first input and responsive to determining that the output has remained in the first state, providing an indication that the comparator is a defective comparator.

13. The method of claim 9, further comprising:

providing the first reference voltage, the second reference voltage, and the third reference voltage by selecting associated taps of a resistor digital-to-analog converter (RDAC).

14. The method of claim 13, wherein the first reference voltage is associated with a first tap of the RDAC that provides a highest voltage level, the third reference voltage is associated with a third tap of the RDAC that provides a voltage level that is less than the first tap, and the second reference voltage is associated with a second tap of the RDAC that provides a voltage level that is less than the third tap.

15. The method of claim 9, wherein the comparator output drives an input of a voltage regulator.

16. A device comprising:

a comparator comprising a first comparator input, a second comparator input, and a comparator output;

a selection circuit, including a first selector output coupled to the first comparator input and a second selector output coupled to the second comparator input, the selection circuit including a first plurality of selector inputs, each of the first plurality of selector inputs coupled to receive a reference voltage of a corresponding plurality of reference voltages, the selection circuit including a first selector input coupled to receive a variable voltage;

wherein;

during a first mode of operation, the selection circuit provides the variable voltage to the first comparator input and provides a first selected voltage of the plurality of reference voltages to the second comparator input, wherein the comparator provides at the comparator output an indication of a comparison of the variable voltage and the first selected voltage;

during a second mode of operation, the selection circuit provides a second selected voltage of the plurality of reference voltages to the first comparator input and a third selected voltage of the plurality of reference voltages to the second comparator input, and the device measures a switching offset voltage of the comparator based on the second selected voltage and the third selected voltage, wherein providing the second reference voltage and providing the third reference voltage further comprises selecting successive reference voltages of the plurality of reference voltages to be provided to the first and second inputs of the first comparator; and

,

wherein selecting successive reference voltages of the plurality of reference voltages further comprises providing the second reference voltage to the second input of the first comparator and the third reference voltage to the first input of the first comparator prior to providing the second reference voltage to the first input of the first comparator and the third reference voltage to the second input of the first comparator.

17. The device of claim 16, wherein during the second mode of operation, the selection circuit selectively couples different selector inputs of the first plurality of selector inputs to the first comparator input to provide different reference voltages prior to providing the first selected voltage to the second comparator input and the second selected voltage to the first comparator input.

18. The device of claim 16, wherein during the second mode of operation, the selection circuit selectively provides the second selected voltage to the second comparator input and the third selected voltage to the first comparator input, prior to providing the second selected voltage to the first comparator input and the third selected voltage to the second comparator input.

19. The device of claim 16, wherein the selection circuit measures the switching offset voltage as a voltage difference between the second selected voltage and the third selected voltage.

20. The device of claim 16, wherein:

during the first mode of operation, the comparator output drives an input of a voltage regulator to regulate the variable voltage; and

the device further comprises a switch coupled to the comparator output to isolate the comparator output from the input of the voltage regulator, wherein the switch is open during the second mode.