Common-mode step response for autozero amplifiers

• US 8,624,668 B2
• Filed: 12/14/2011
• Issued: 01/07/2014
• Est. Priority Date: 07/12/2011
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Wan, Quan, Alexander, Alasdair G.
• Primary Examiner(s): Mottola, Steven J
• Application Number:
  US13/325,750
• Publication Number:
  US 20130015916A1
• Time in Patent Office: 755 Days
• Field of Search: 330/9, 330/11, 327/124, 327/307
• US Class Current: 330/9
• CPC Class Codes: H03F 2200/261 Amplifier which being suitable for instrumentation applications
• CPC Class Codes: H03F 2200/375 Circuitry to compensate the offset being present in an amplifier
• CPC Class Codes: H03F 2203/45138 Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers
• CPC Class Codes: H03F 2203/45514 the FBC comprising one or more switched capacitors, and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45521 the FBC comprising op amp stages, e.g. cascaded stages of the dif amp and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45551 the IC comprising one or more switched capacitors
• CPC Class Codes: H03F 2203/45634 the LC comprising one or more switched capacitors
• CPC Class Codes: H03F 2203/45682 the LC comprising one or more op-amps
• CPC Class Codes: H03F 2203/45726 the LC comprising more than one switch, which are not cross coupled
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03F 3/45977 using switching means, e.g. sample and hold
• CPC Class Codes: H03F 3/45995 using switching means

Abstract

An auto-zero amplifier includes a main amplifier for amplifying an input signal; the main amplifier receives an offset-correction signal for cancelling an offset at a first common-mode level of the input signal. At the first common-mode level, the offset-correction signal is based on a first value stored using a first offset-storage element. When a change is detected in the input common-mode from the first level to a second level, the first offset-storage element is switched out and a second offset-storage element, having a second value based on the second common-mode level, is switched in.

Claims

1. A system for improving common-mode response of an auto-zero amplifier, the system comprising:

a first offset-storage element for storing a first value corresponding to a first common-mode level of an input signal;

a second offset-storage element for storing a second value corresponding to a second common-mode level of the input signal;

a main amplifier for amplifying the input signal, the main amplifier receiving an offset-correction signal, generated based on the first value, for cancelling an offset at the first common-mode level;

control logic for detecting a transition in the input signal from the first common-mode level to the second common-mode level; and

a switch for, upon detection of the transition, severing a first connection to the first offset-storage element and creating a second connection to the second offset-storage element, thereby generating the offset-correction signal using the second value instead of the first value.

2. The system of claim 1, wherein the first and second offset-storage elements are capacitors or digital registers.

3. The system of claim 1, wherein the switch severs and creates the first and second connections immediately upon detection of the transition when the main amplifier is in a signal-path mode and during a next transition of an auto-zero clock when the main amplifier is in an auto-zero mode.

4. The system of claim 1, wherein the auto-zero amplifier is a ping-pong auto-zero amplifier.

5. The system of claim 4, wherein the main amplifier, first and second steady-state offset-storage elements, control logic, and switch comprise one of two paths in the ping-pong auto-zero amplifier, and wherein the system further comprises a second path comprising a second main amplifier, second first and second offset-storage elements, a second control logic, and a second switch.

6. The system of claim 5, further comprising an auto-zero clock for switching between the first path and the second path.

7. The system of claim 1, further comprising a third offset-storage element for storing a third value corresponding to the first common-mode level of the input signal, wherein the control logic detects a second transition in the input signal from the second common-mode level back to the first common-mode level, and wherein the switch severs the first or second connections and creates a third connection to the third offset-storage element.

8. The system of claim 1, further comprising an auxiliary differential pair for generating the offset-correction signal in accordance with the values of the first or second offset-storage elements.

9. The system of claim 1, further comprising (i) a first auxiliary differential pair for generating the offset-correction signal, in accordance with the value of the second offset-storage element, for low-to-high transitions of the common-mode level of the input signal and (ii) a second auxiliary differential pair for generating the offset-correction signal, in accordance with a value of a third settling offset-storage element, for high-to-low transitions of the common-mode level of the input signal.

10. The system of claim 9, further comprising a third auxiliary differential pair for generating the offset-correction signal, in accordance with the value of the first offset-storage element, during a steady-state of the common-mode level of the input signal.

11. A method for improving common-mode response in an auto-zero amplifier, the method comprising:

generating an offset-correction signal for correcting an offset in a main amplifier, the offset-correction signal depending at least in part on a first value corresponding to a first common-mode level of an input signal;

detecting a change in the common-mode level of the input signal from the first common-mode level to a second common-mode level;

switching, in response to the detected change, the first value for a second value previously stored for the second common-mode voltage level, thereby modifying the offset-correction signal; and

applying the modified offset-correction signal to the main amplifier to thereby cancel a new offset introduced by the change in the common-mode level.

12. The method of claim 11, further comprising (i) detecting a second change in the input common-mode level of the signal input from the second common-mode level back to the first common-mode level, (ii) switching, in response to the detected second change, the first or second value with a third value previously stored for the first common-mode voltage level;

and (iii) applying the modified offset-correction signal to the main amplifier to thereby cancel a new offset introduced by the second change in the common-mode level.

13. The method of claim 11, wherein the switching occurs immediately after detecting the change if the main amplifier is in a signal-path mode and after a next transition in an auto-zero clock if the main amplifier is in an auto-zero mode.

14. The method of claim 11, further comprising disconnecting the second offset-storage element prior to the input common-mode voltage changing from the second voltage level.

15. The method of claim 11, further comprising storing the first and second values in capacitors or digital registers.

16. The method of claim 11, further comprising storing the second value prior to the detected change.

17. The method of claim 16, wherein the storing of the second value occurs during an auto-zero mode.