Method for setting transistor operating point and circuit therefor, method for changing signal component value and active-matrix liquid crystal display device

• US 8,625,038 B2
• Filed: 06/04/2002
• Issued: 01/07/2014
• Est. Priority Date: 06/04/2001
• Status: Active Grant

• Current Assignee: HannStar Display Corporation
• Original Assignee: Gold Charm Limited (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Takatori, Ken-ichi
• Primary Examiner(s): Rude, Timothy L
• Application Number:
  US10/479,426
• Publication Number:
  US 20040171221A1
• Time in Patent Office: 4,235 Days
• Field of Search: 349/42
• US Class Current: 349/42
• CPC Class Codes: G02F 1/13306 Circuit arrangements or driving methods for the control of single liquid crystal cells G02F1/132, G02F1/133382 take precedence
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G09G 2300/0833 forming a linear amplifier or follower
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2320/02 Improving the quality of display appearance
• CPC Class Codes: G09G 2320/0219 Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
• CPC Class Codes: G09G 2320/0257 Reduction of after-image effects
• CPC Class Codes: G09G 2320/0261 in the context of movement of objects on the screen or movement of the observer relative to the screen
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: H03K 17/102 in field-effect transistor switches
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00

Abstract

A data signal voltage on a signal line 102 is held in a voltage holding capacitor 106 through an n-type MOS transistor 103 switched on by a gate scan voltage, and supplied to an analog amplifier circuit 104-1. The analog amplifier circuit 104-1 is formed of an MOS transistor having a double gate structure, and the operating point thereof is set at an operating range in which dependence of Ids on Vds is substantially nullified. Even when Vds is varied due to a response of liquid crystal 109, Ids is substantially fixed. Accordingly, the pixel voltage which is substantially proportional to the data signal voltage can be applied to the liquid crystal 109.

Claims

1. An active-matrix liquid crystal display device comprising:

a plurality of scan lines configured for providing a scan voltage;

a plurality of signal lines crossing the scan lines configured for providing a data signal; and

a plurality of pixel circuit positioned the neighborhood of each of the cross points of scan lines and signal lines, each pixel circuit comprising;

a first transistor comprising a gate connected to one of the scan lines, a source connected to one of the signal lines, and a drain;

a second transistor comprising a gate connected to the drain of the first transistor, a source connected to the gate of the first transistor, and a drain connected to said liquid crystal; and

a third transistor comprising a source connected to the drain of the second transistor, a gate configured for receiving a first voltage, and a drain configured for receiving a second voltage,

wherein the second transistor provides the data signal to the second transistor on the basis of the scan voltage of the scan line, the second transistor provides a pixel voltage to the liquid crystal according to the received data signal, said liquid crystal displays images corresponding to the pixel voltage, a drain current of the second transistor is substantially constant even when the source-drain voltage of the first transistor is varied.

2. The active-matrix liquid crystal display device according to claim 1, wherein a drain current of the third transistor is substantially constant even when the source-drain voltage of the third transistor is varied.

3. The active-matrix liquid crystal display device according to claim 1, wherein a voltage different between the first voltage and the second voltage is about −

3 volts.

4. The active-matrix liquid crystal display device according to claim 1, wherein the second transistor is a source follower type analog amplifier circuit and comprises a multi-gate structure equivalently achieved by commonly connecting respective gates of plural unipolar fourth transistors each having a single gate structure and connecting the plural unipolar fourth transistors to one another in series.

5. The active-matrix liquid crystal display device according to claim 4, wherein the third transistor is a load element and comprises a multi-gate structure by commonly connecting respective gates of plural unipolar fifth transistors each having a single gate structure and connecting the plural unipolar fifth transistors to one another in series.

6. The active-matrix liquid crystal display device according to claim 1, wherein a resistance value between the source and drain of the second transistor is not more than the value of a resistance component which determines the response time constant of the liquid crystal, and a resistance value between the source and drain of the third transistor is not more than the value of a resistance component used to determine response time constant of the liquid crystal.