Method and apparatus of an input resistance of a passive mixer to broaden the input matching bandwidth of a common source/gate LNA

• US 8,626,106 B2
• Filed: 12/06/2011
• Issued: 01/07/2014
• Est. Priority Date: 12/06/2011
• Status: Active Grant

• Current Assignee: Tensorcom Inc
• Original Assignee: Tensorcom Inc
• Inventors: Soe, Zaw
• Primary Examiner(s): Jackson, Blane J
• Application Number:
  US13/312,806
• Publication Number:
  US 20130143511A1
• Time in Patent Office: 763 Days
• Field of Search: 455/313, 455/334, 455/341, 330/311
• US Class Current: 455/341
• CPC Class Codes: H03D 7/125 with field effect transistors
• CPC Class Codes: H03D 7/1441 using field-effect transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1466 Passive mixer arrangements
• CPC Class Codes: H03D 7/165 at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 1/42 Modifications of amplifiers to extend the bandwidth
• CPC Class Codes: H03F 2200/108 A coil being added in the drain circuit of a FET amplifier stage, e.g. for noise reducing purposes
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/492 A coil being added in the source circuit of a transistor amplifier stage as degenerating element
• CPC Class Codes: H03F 2200/72 the amplifier stage being a common gate configuration MOSFET
• CPC Class Codes: H03F 2200/75 the amplifier stage being a common source configuration MOSFET
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/387 with semiconductor devices only
• CPC Class Codes: H03F 3/45071 with semiconductor devices only
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H04L 27/38 Demodulator circuits; Receiver circuits

Abstract

A cascode common source and common gate LNAs operating at 60 GHz are introduced and described. The cascode common source LNA is simulated to arrive at an optimum ratio of upper device width to the lower device width. The voltage output of the cascode common source LNA is translated into a current to feed and apply energy to the mixer stage. These input current signals apply the energy associated with the current directly into the switched capacitors in the mixer to minimize the overall power dissipation of the system. The LNA is capacitively coupled to the mixer switches in the I and Q mixers and are enabled and disabled by the clocks generated by the quadrature oscillator. These signals are then amplified by a differential amplifier to generate the sum and difference frequency spectra.

Claims

1. A receiver comprising:

a LNA (Low Noise Amplifier) configured in a cascode structure coupled to a resonant circuit;

the resonant circuit provides an output signal spectrum; and

a width of a top cascode device in the LNA is reduced with respect to a constant width of a lower cascode device to decrease a center frequency of the resonant circuit.

2. The receiver of claim 1, further comprising:

a first switched capacitor circuit capacitively coupled to the resonant circuit.

3. The receiver of claim 2, wherein

an oscillator clocks the first switched capacitor circuit presenting an impedance to the resonant circuit;

and

the impedance of the first switched capacitor circuit increases a bandwidth of the resonant circuit.

4. The receiver of claim 1, further comprising:

an input signal spectrum coupled to an input of the LNA.

5. The receiver of claim 2, further comprising:

the resonant circuit capacitively coupled to a second switched capacitor circuit;

a clock signal of an oscillator enables a first mixer switch of the first switched capacitor circuit coupled to a first input of a first differential amplifier;

an inverse clock signal of the oscillator enables a second mixer switch of the second switched capacitor circuit coupled to a second input of the first differential amplifier; and

outputs of the first differential amplifier provide an in-phase sum frequency and an in-phase difference frequency spectrum between an output signal spectrum of the resonant circuit and the clock signal.

6. The receiver of claim 5, wherein

the first and second switched capacitor circuits comprise a first mixer.

7. The receiver of claim 6, wherein

energy from the resonant circuit powers the first mixer.

8. The receiver of claim 5, further comprising:

the resonant circuit capacitively coupled to a third switched capacitor circuit;

the resonant circuit capacitively coupled to a fourth switched capacitor circuit;

a quadrature clock signal of the oscillator enables a third mixer switch of the third switched capacitor circuit coupled to a first input of a second differential amplifier;

a quadrature inverse clock signal of the oscillator enables a fourth mixer switch of the fourth switched capacitor circuit coupled to a second input of the second differential amplifier; and

outputs of the second differential amplifier provide a quadrature sum frequency and a quadrature difference frequency spectrum between the output signal spectrum and the quadrature clock signal.

9. A receiver comprising:

a LNA (Low Noise Amplifier) coupled to a resonant circuit providing an output signal spectrum;

the resonant circuit capacitively coupled to a first switched capacitor circuit;

an oscillator clocks the first switched capacitor circuit coupling an impedance across the resonant circuit; and

the impedance of the first switched capacitor circuit increases a bandwidth of the resonant circuit.

10. The receiver of claim 9, wherein

the LNA is configured in a cascode structure.

11. The receiver of claim 10, wherein

a width of a top cascode device in the LNA is adjusted with respect to a width of a lower cascode device to shift a center frequency of the resonant circuit.

12. The receiver of claim 9, further comprising:

an input signal spectrum coupled to an input of the LNA.

13. The receiver of claim 9, further comprising:

the output signal spectrum capacitively coupled to a second switched capacitor circuit;

a clock signal of the oscillator enables a first mixer switch of the first switched capacitor circuit coupled to a first input of a first differential amplifier;

an inverse clock signal of the oscillator enables a second mixer switch of the second switched capacitor circuit coupled to a second input of the first differential amplifier; and

outputs of the first differential amplifier provide an in-phase sum frequency and an in-phase difference frequency spectrum between the output signal spectrum and the clock signal.

14. The receiver of claim 13, wherein

the first and second switched capacitor circuits comprise a first mixer.

15. The receiver of claim 14, wherein

energy from the resonant circuit powers the first mixer.

16. The receiver of claim 13, further comprising:

the resonant circuit capacitively coupled to a third switched capacitor circuit;

the resonant circuit capacitively coupled to a fourth switched capacitor circuit;

a quadrature clock signal of the oscillator enables a third mixer switch of the third switched capacitor circuit coupled to a first input of a second differential amplifier;

a quadrature inverse clock signal of the oscillator enables a fourth mixer switch of the fourth switched capacitor circuit coupled to a second input of the second differential amplifier; and

outputs of the second differential amplifier provide a quadrature sum frequency and a quadrature difference frequency spectrum between the output signal spectrum and the quadrature clock signal.