Processor-bus-connected flash storage paging device using a virtual memory mapping table and page faults
First Claim
1. A method for accessing a virtual memory of a processor using a processor-bus-connected flash storage module (PFSM) as a first paging device and a hard disk drive (HDD) as a second paging device, the PFSM operatively coupled to the processor via a processor bus, the PFSM comprising a flash memory and a virtual address mapping table, the method comprising:
- allocating a first address partition and a second address partition of the virtual memory for a software application of the processor to the first paging device and the second paging device, respectively;
identifying a virtual memory page in the first paging device responsive to a page fault of the virtual memory triggered by the software application;
sending a page access request to the PFSM for accessing the virtual memory page responsive to the page fault, wherein the page access request is sent via the processor bus and comprises a virtual address of the virtual memory page; and
receiving the virtual memory page from the PFSM based on a command of the processor bus issued by the PFSM in conjunction with performing a flash memory access in the flash memory using a flash page address, wherein the virtual address mapping table translates the virtual address of the virtual memory page to the flash page address in the flash memory.
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Accused Products
Abstract
A method for accessing a virtual memory of a processor using a processor-bus-connected flash storage module (PFSM) as a first paging device and a hard disk drive (HDD) as a second paging device, the method including: allocating a first address partition and a second address partition of a virtual memory for a software application of a processor to the first paging device and the second paging device, respectively, identifying a virtual memory page in the first paging device responsive to a page fault of the virtual memory triggered by the software application, sending a page access request to the PFSM for accessing the virtual memory page responsive to the page fault, and receiving the virtual memory page from the PFSM based on a command of the processor bus issued by the PFSM in conjunction with performing a flash memory access in the flash memory using a flash page address.
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Citations
9 Claims
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1. A method for accessing a virtual memory of a processor using a processor-bus-connected flash storage module (PFSM) as a first paging device and a hard disk drive (HDD) as a second paging device, the PFSM operatively coupled to the processor via a processor bus, the PFSM comprising a flash memory and a virtual address mapping table, the method comprising:
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allocating a first address partition and a second address partition of the virtual memory for a software application of the processor to the first paging device and the second paging device, respectively; identifying a virtual memory page in the first paging device responsive to a page fault of the virtual memory triggered by the software application; sending a page access request to the PFSM for accessing the virtual memory page responsive to the page fault, wherein the page access request is sent via the processor bus and comprises a virtual address of the virtual memory page; and receiving the virtual memory page from the PFSM based on a command of the processor bus issued by the PFSM in conjunction with performing a flash memory access in the flash memory using a flash page address, wherein the virtual address mapping table translates the virtual address of the virtual memory page to the flash page address in the flash memory. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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Specification