Multiple transistor types formed in a common epitaxial layer by differential out-diffusion from a doped underlayer
First Claim
1. A method of forming a plurality of transistor device types on an integrated circuit, the transistors having a gate disposed over a semiconductive channel, comprising:
- doping selected portions of a wafer to form a first plurality of wells of a first conductivity type;
doping selected portions of the first plurality of wells to form a first plurality of screen layers of the first conductivity type, the screen layers being disposed closer to a surface of the wafer than the wells;
doping selected portions of the first plurality of screen layers to introduce diffusion-inhibiting dopant species;
growing a substantially undoped epitaxial layer over the screen layer to a defined thickness and uniformity;
out-diffusing dopants from the screen layer into the epitaxial layer to result in discrete threshold voltage devices by way of a thermal cycling process to result in defined degrees of out-diffusion of dopants that are differentiated by distance of dopant mitigation toward the gate; and
forming an anti-punchthrough layer between at least one of the first plurality of wells and at least one of the first plurality of screen layers that overlies the at least one of the first plurality of wells;
wherein the anti-punchthrough layer has a doping concentration greater than a doping concentration of the at least one well, and less than a doping concentration of the overlying screen layer.
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Accused Products
Abstract
Multiple transistor types are formed in a common epitaxial layer by differential out-diffusion from a doped underlayer. Differential out-diffusion affects the thickness of a FET channel, the doping concentration in the FET channel, and distance between the gate dielectric layer and the doped underlayer. Differential out-diffusion may be achieved by differentially applying a dopant migration suppressor such as carbon; differentially doping the underlayer with two or more dopants having the same conductivity type but different diffusivities; and/or differentially applying thermal energy.
518 Citations
15 Claims
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1. A method of forming a plurality of transistor device types on an integrated circuit, the transistors having a gate disposed over a semiconductive channel, comprising:
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doping selected portions of a wafer to form a first plurality of wells of a first conductivity type; doping selected portions of the first plurality of wells to form a first plurality of screen layers of the first conductivity type, the screen layers being disposed closer to a surface of the wafer than the wells; doping selected portions of the first plurality of screen layers to introduce diffusion-inhibiting dopant species; growing a substantially undoped epitaxial layer over the screen layer to a defined thickness and uniformity; out-diffusing dopants from the screen layer into the epitaxial layer to result in discrete threshold voltage devices by way of a thermal cycling process to result in defined degrees of out-diffusion of dopants that are differentiated by distance of dopant mitigation toward the gate; and forming an anti-punchthrough layer between at least one of the first plurality of wells and at least one of the first plurality of screen layers that overlies the at least one of the first plurality of wells; wherein the anti-punchthrough layer has a doping concentration greater than a doping concentration of the at least one well, and less than a doping concentration of the overlying screen layer.
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2. A method of forming a plurality of transistor device types on an integrated circuit, the transistors having a gate disposed over a semiconductive channel, comprising:
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doping selected portions of a wafer to form a first plurality of wells of a first conductivity type; doping selected portions of the first plurality of wells to form a first plurality of screen layers of the first conductivity type, the screen layers being disposed closer to a surface of the wafer than the wells; doping selected portions of the first plurality of screen layers to introduce diffusion-inhibiting dopant species; growing a substantially undoped epitaxial layer over the screen layer to a defined thickness and uniformity; and out-diffusing dopants from the screen layer into the epitaxial layer to result in discrete threshold voltage devices by way of a thermal cycling process to result in defined degrees of out-diffusion of dopants that are differentiated by distance of dopant migration toward the gate; wherein differentially out-diffusing dopants forms at least a first channel region having a first thickness and a second channel region having a second thickness, and the first and second thicknesses are different. - View Dependent Claims (3)
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4. A method of forming a plurality of transistor device types on an integrated circuit, the transistors having a gate disposed over a semiconductive channel, comprising:
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doping selected portions of a wafer to form a first plurality of wells of a first conductivity type; doping selected portions of the first plurality of wells to form a first plurality of screen layers of the first conductivity type, the screen layers being disposed closer to a surface of the wafer than the wells; doping selected portions of the first plurality of screen layers to introduce diffusion-inhibiting dopant species; growing a substantially undoped epitaxial layer over the screen layer to a defined thickness and uniformity; out diffusing dopants from the screen layer into the epitaxial layer to result in discrete threshold voltage devices by way of a thermal cycling process to result in defined degrees of out-diffusion of dopants that are differentiated by distance of dopant migration toward the gate; and forming a threshold voltage setting layer above the screen layer and below the surface of the epitaxial layer.
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5. A method of forming a plurality of transistor device types on an integrated circuit, the transistors having a gate disposed over a semiconductive channel, comprising:
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doping selected portions of a wafer to form a first plurality of wells of a first conductivity type; doping selected portions of the first plurality of wells to form a first plurality of screen layers of the first conductivity type, the screen layers being disposed closer to a surface of the wafer than the wells; doping selected portions of the first plurality of screen layers to introduce diffusion-inhibiting dopant species; growing a substantially undoped epitaxial layer over the screen layer to a defined thickness and uniformity; out-diffusing dopants from the screen layer into the epitaxial layer to result in discrete threshold voltage devices by way of a thermal cycling process to result in defined degrees of out-diffusion of dopants that are differentiated by distance of dopant migration toward the gate; and performing a halo implant into predetermined portions of the epitaxial layer.
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6. A method of making a System on Chip integrated circuit, comprising:
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forming a plurality of transistor device types on a die; and interconnecting predetermined ones of the plurality of transistor device types to form a plurality of circuit blocks; wherein forming the plurality of transistor device types comprises; forming transistor channel regions having different electrical characteristics by differentially out-diffusing dopants into a common epitaxial layer from an underlying screen layer, the screen layer having a plurality of compositionally different regions. - View Dependent Claims (7, 8, 9, 10)
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11. An integrated circuit, comprising:
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a plurality of n-channel field effect transistors (NFETs) and a plurality of p-channel field effect transistors (PFETs) all having channel regions disposed in a commonly formed epitaxial layer; a screen layer underlying the epitaxial layer, the screen layer having a plurality of regions with different doping profiles; a first portion of the plurality of NFETs having a first set of electrical characteristics and a second portion of the plurality of NFETs having a second set of electrical characteristics that are different from the first set of electrical characteristics; and a first portion of the plurality of PFETs having a third set of electrical characteristics and a second portion of the plurality of PFETs having a fourth set of electrical characteristics that are different from the third set of electrical characteristics; wherein the difference between the first and second sets of electrical characteristics are related to the different doping profiles of the respective underlying regions of the screen layer, and the difference between the third and fourth sets of electrical characteristics are related to the different doping profiles of the respective underlying regions of the screen layer. - View Dependent Claims (12, 13, 14, 15)
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Specification