Display device and manufacturing method thereof

• US 8,629,434 B2
• Filed: 05/02/2013
• Issued: 01/14/2014
• Est. Priority Date: 12/25/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Arai, Yasuyuki
• Primary Examiner(s): POTTER, ROY KARL
• Application Number:
  US13/875,573
• Publication Number:
  US 20130234136A1
• Time in Patent Office: 257 Days
• Field of Search: 257/43, 257/59, 257/E29.269, 257/E33.019, 257/E21.459, 438/46, 438/104, 438/58
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02581 Transition metal or rare earth elements
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A display device includes a first wiring functioning as a gate electrode formed over a substrate, a gate insulating film formed over the first wiring, a second wiring and an electrode layer provided over the gate insulating film, and a high-resistance oxide semiconductor layer formed between the second wiring and the electrode layer are included. In the structure, the second wiring is formed using a stack of a low-resistance oxide semiconductor layer and a conductive layer over the low-resistance oxide semiconductor layer, and the electrode layer is formed using a stack of the low-resistance oxide semiconductor layer and the conductive layer which is stacked so that a region functioning as a pixel electrode of the low-resistance oxide semiconductor layer is exposed.

Claims

1. A semiconductor device comprising:

a first oxide semiconductor layer comprising indium;

a second oxide semiconductor layer comprising indium, the second oxide semiconductor layer being in contact with the first oxide semiconductor layer;

a gate electrode;

a gate insulating film between the gate electrode and the first oxide semiconductor layer; and

an insulating film comprising silicon in contact with the second oxide semiconductor layer and the gate insulating film,

wherein the second oxide semiconductor layer includes a depressed portion overlapping with the gate electrode, and

wherein a thickness of the depressed portion of the second oxide semiconductor layer is thinner than a thickness of the first oxide semiconductor layer.

2. The semiconductor device according to claim 1, further comprising a capacitor comprising the first oxide semiconductor layer.

3. The semiconductor device according to claim 1, wherein the second oxide semiconductor layer includes a crystalline structure.

4. The semiconductor device according to claim 1, wherein a composition ratio of the first oxide semiconductor layer is different from a composition ratio of the second oxide semiconductor layer.

5. The semiconductor device according to claim 1, wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer further comprises zinc.

6. The semiconductor device according to claim 1, wherein the first oxide semiconductor layer has a tapered side surface.

7. A semiconductor device comprising:

a first oxide semiconductor layer comprising indium;

a second oxide semiconductor layer comprising indium, the second oxide semiconductor layer being in contact with the first oxide semiconductor layer;

a gate electrode;

a gate insulating film between the gate electrode and the first oxide semiconductor layer;

a source electrode in electrical contact with the first oxide semiconductor layer;

a drain electrode in electrical contact with the first oxide semiconductor layer; and

an insulating film comprising silicon in contact with the second oxide semiconductor layer, the source electrode, the drain electrode, and the gate insulating film,

wherein the second oxide semiconductor layer includes a depressed portion overlapping with the gate electrode,

wherein the depressed portion is located between the source electrode and the drain electrode, and

wherein a thickness of the depressed portion of the second oxide semiconductor layer is thinner than a thickness of the first oxide semiconductor layer.

8. The semiconductor device according to claim 7, further comprising a capacitor comprising the first oxide semiconductor layer.

9. The semiconductor device according to claim 7, wherein the second oxide semiconductor layer includes a crystalline structure.

10. The semiconductor device according to claim 7, wherein a composition ratio of the first oxide semiconductor layer is different from a composition ratio of the second oxide semiconductor layer.

11. The semiconductor device according to claim 7, wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer further comprises zinc.

12. The semiconductor device according to claim 7, wherein the first oxide semiconductor layer has a tapered side surface.

13. The semiconductor device according to claim 7,

wherein the source electrode is located over the first oxide semiconductor layer, and

wherein the second oxide semiconductor layer is located over the source electrode.

14. A semiconductor device comprising:

a first oxide semiconductor layer comprising indium;

a second oxide semiconductor layer comprising indium, the second oxide semiconductor layer being in contact with the first oxide semiconductor layer;

a gate electrode;

a gate insulating film between the gate electrode and the first oxide semiconductor layer;

a source electrode in electrical contact with the first oxide semiconductor layer;

a drain electrode in electrical contact with the first oxide semiconductor layer;

a first insulating film comprising silicon in contact with the second oxide semiconductor layer, the source electrode, the drain electrode, and the gate insulating film,

a second insulating film comprising silicon and nitrogen over the first insulating film;

a third insulating film comprising an organic material over the second insulating film; and

a pixel electrode over the third insulating film, wherein the pixel electrode is electrically connected to one of the source electrode and the drain electrode,

wherein the second oxide semiconductor layer includes a depressed portion overlapping with the gate electrode,

wherein the depressed portion is located between the source electrode and the drain electrode, and

wherein a thickness of the depressed portion of the second oxide semiconductor layer is thinner than a thickness of the first oxide semiconductor layer.

15. The semiconductor device according to claim 14, further comprising a capacitor comprising the first oxide semiconductor layer.

16. The semiconductor device according to claim 14, wherein the second oxide semiconductor layer includes a crystalline structure.

17. The semiconductor device according to claim 14, wherein a composition ratio of the first oxide semiconductor layer is different from a composition ratio of the second oxide semiconductor layer.

18. The semiconductor device according to claim 14, wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer further comprises zinc.

19. The semiconductor device according to claim 14, wherein the first oxide semiconductor layer has a tapered side surface.

20. The semiconductor device according to claim 14,

wherein the source electrode is located over the first oxide semiconductor layer, and

wherein the second oxide semiconductor layer is located over the source electrode.