Ethernet network synchronization systems and methods

• US 8,630,315 B2
• Filed: 02/17/2010
• Issued: 01/14/2014
• Est. Priority Date: 02/17/2010
• Status: Active Grant

• Current Assignee: Ciena Corporation
• Original Assignee: Ciena Corporation
• Inventors: Rivaud, Daniel, Gazier, Michal, Dziawa, Michael
• Primary Examiner(s): Moore, Jr., Michael J
• Application Number:
  US12/706,724
• Publication Number:
  US 20110200051A1
• Time in Patent Office: 1,427 Days
• Field of Search: None
• US Class Current: 370/509
• CPC Class Codes: H04J 3/0641 Change of the master or reference, e.g. take-over or failure of the master
• CPC Class Codes: H04J 3/0644 External master-clock
• CPC Class Codes: H04J 3/0658 Clock or time synchronisation among packet nodes
• CPC Class Codes: H04J 3/0667 Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays arrangements for monitoring round trip delays in packet switching networks H04L43/0864
• CPC Class Codes: H04J 3/0673 using intermediate nodes, e.g. modification of a received timestamp before further transmission to the next packet node, e.g. including internal delay time or residence time into the packet
• CPC Class Codes: H04L 12/413 with random access, e.g. carrier-sense multiple-access with collision detection [CSMA-CD]

Abstract

The present disclosure relates to Ethernet synchronization systems and methods that combines Synchronous Ethernet (Sync-E) and Precision Time Protocol (PTP) IEEE 1588 algorithms. The present invention includes systems and methods for Ethernet networks and node configurations that include a set of rules on node placement, such as Boundary Clock (BC) nodes and Sync-E nodes, a clock selection algorithm, a holdover algorithm, and the like. Advantageously, the present invention provides an architecture that allows practical and real-world useful clock propagation through placement of BCs and Sync-E nodes for best performance. Practical experience and theoretical design are embodied in the present invention to define a very specific set of rules on how to build a network capable of providing accurate and reliable synchronization. The present invention includes clock selection that unifies Sync-E and 1588 algorithms.

Claims

1. An Ethernet network, comprising:

one or more non-clocked nodes without synchronous Ethernet (Sync-E) or IEEE 1588 capability;

an end node with a clock providing an Ethernet connection comprising a reference clock through at least one of the one or more non-clocked nodes;

a clock regeneration node disposed after the at least one of the one or more non-clocked nodes receiving the Ethernet connection and regenerating the reference clock, wherein the clock regeneration node is located at a drop off point of the Ethernet connection; and

one or more Sync-E nodes receiving the Ethernet connection after the clock regeneration node, wherein the end node operates according to the IEEE 1588 protocols, and wherein the one or more Sync-E nodes operate according to the Sync-E protocols thereby reducing a number of slaves for IEEE 1588.

2. The Ethernet network of claim 1, wherein the clock regeneration node is configured to operate according to both synchronous Ethernet (Sync-E) and IEEE 1588 protocols.

3. The Ethernet network of claim 1, wherein the clock regeneration node is configured to regenerate Sync-E for downstream nodes without requiring Sync-E upstream, and wherein the reference clock is according to the IEEE 1588 protocols and operable to traverse asynchronous nodes while being rebuilt at the clock regeneration node.

4. The Ethernet network of claim 1, wherein the Ethernet connection traverses no more than five consecutive non-clocked nodes prior to the clock regeneration node.

5. The Ethernet network of claim 1, wherein the Ethernet connection traverses no more than one consecutive non-clocked node prior to the clock regeneration node.

6. The Ethernet network of claim 1, wherein the Ethernet connection traverses more than one consecutive non-clocked node prior to the clock regeneration node, and the Ethernet network further comprises:

a high stability local oscillator at the clock regeneration node.

7. The Ethernet network of claim 1, wherein at each of the one or more non-clocked nodes is configured to provide packets from the Ethernet connection with the clock reference in a high priority queue.

8. The Ethernet network of claim 1, wherein the end node comprises:

physical interfaces and circuitry configured to timestamp ingress and egress packets relative to a phase clock;

a processor operating according to the IEEE 1588 protocols, the processor receiving timestamps and providing one or more reference clocks to an input selector; and

a phase lock loop receiving an output of the input selector and providing an output reference clock to the processor.

9. The Ethernet network of claim 8, further comprising a best multi source clock selection algorithm and a clock selection holdover algorithm for the end node.

10. The Ethernet network of claim 1, wherein the one or more Sync-E nodes each comprise:

physical interfaces providing a reference clock to a clock input selector;

circuitry receiving synchronization status messages from the physical interfaces and providing the synchronization status messages to the clock input selector; and

a phase lock loop receiving an input from the clock input selector and providing an output to the physical interfaces.

11. The Ethernet network of claim 10, further comprising a best multi source clock selection algorithm and a clock selection holdover algorithm for the end clock node.

12. A method, comprising:

transmitting an Ethernet connection with a reference clock in a network;

adapting quality of service in at least one Transparent Clock node in the network for the Ethernet connection;

regenerating the reference clock at a clock regeneration node located at a drop off point of the Ethernet connection after the Ethernet connection traverses at least one non-clocked node in the network without synchronous Ethernet (Sync-E) or IEEE 1588 capability; and

receiving the Ethernet connection at at least one clocked node after the clock regeneration node;

wherein the clock regeneration node is configured to regenerate Sync-E for downstream nodes without requiring Sync-E upstream, and wherein the reference clock is according to the IEEE 1588 protocols and operable to traverse asynchronous nodes while being rebuilt at the clock regeneration node.

13. The method of claim 12, further comprising:

receiving a plurality of reference sources at a node in the network, the reference sources comprising one or more of IEEE 1588 sources, Synchronous Ethernet (Sync-E) sources, SONET/SDH sources, Network Time Protocol sources, and external reference sources;

determining quality metrics of the plurality of reference sources;

selecting one of the plurality of reference sources based on the quality metrics;

performing an adaptive/predictive filter algorithm; and

inputting the selected source to a phase lock loop.

14. The method of claim 13, further comprising:

selecting the one of the plurality of reference sources based on a tunnel technology comprising at least PBB-TE or MPLS-TP.

15. An Ethernet network, comprising:

one or more non-clocked nodes without synchronous Ethernet (Sync-E) or IEEE 1588 capability;

an end node with a clock providing an Ethernet connection comprising a reference clock through at least one of the one or more non-clocked nodes;

a clock regeneration node disposed after the at least one of the one or more non-clocked nodes receiving the Ethernet connection and regenerating the reference clock, wherein the clock regeneration node is located at a drop off point of the Ethernet connection; and

one or more clocked nodes receiving the Ethernet connection after the clock regeneration node;

wherein the clock regeneration node is configured to regenerate Sync-E for downstream nodes without requiring Sync-E upstream, and wherein the reference clock is according to the IEEE 1588 protocols and operable to traverse asynchronous nodes while being rebuilt at the clock regeneration node.

16. The Ethernet network of claim 15, wherein the clock regeneration node is configured to operate according to both synchronous Ethernet (Sync-E) and IEEE 1588 protocols.

17. The Ethernet network of claim 15, further comprising:

one or more Sync-E nodes receiving the Ethernet connection after the clock regeneration node, wherein the end node operates according to the IEEE 1588 protocols, and wherein the one or more Sync-E nodes operate according to the Sync-E protocols thereby reducing a number of slaves for IEEE 1588.

18. The Ethernet network of claim 15, wherein the end node comprises:

physical interfaces and circuitry configured to timestamp ingress and egress packets relative to a phase clock;

a processor operating according to the IEEE 1588 protocols, the processor receiving timestamps and providing one or more reference clocks to an input selector; and

a phase lock loop receiving an output of the input selector and providing an output reference clock to the processor.

19. The Ethernet network of claim 17, wherein the one or more Sync-E nodes each comprise:

physical interfaces providing a reference clock to a clock input selector;

circuitry receiving synchronization status messages from the physical interfaces and providing the synchronization status messages to the clock input selector; and

a phase lock loop receiving an input from the clock input selector and providing an output to the physical interfaces.