Method for manufacturing a sensor chip

• US 8,633,047 B2
• Filed: 08/29/2012
• Issued: 01/21/2014
• Est. Priority Date: 09/02/2011
• Status: Active Grant

• Current Assignee: Sensirion AG (Sensirion Holding AG)
• Original Assignee: Sensirion AG (Sensirion Holding AG)
• Inventors: Hummel, Rne, Steiner-Vanha, Ralph, Bartsch, Ulrich
• Primary Examiner(s): AHMED, SELIM U
• Application Number:
  US13/597,630
• Publication Number:
  US 20130056838A1
• Time in Patent Office: 510 Days
• Field of Search: 438/29, 438/48, 257/414, 257/E21.001, 257/E29.166
• US Class Current: 438/48
• CPC Class Codes: G01N 27/226 Construction of measuring vessels; Electrodes therefor
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24
• CPC Class Codes: H01L 23/5223 Capacitor integral with wiring layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The present sensor chip comprises a substrate. A plurality of electrode elements is arranged at a first level on the substrate with at least one gap between neighbouring electrode elements. A metal structure is arranged at a second level on the substrate, wherein the second level is different from the first level. The metal structure at least extends over an area of the second level that is defined by a projection of the at least one gap towards the second level.

Claims

1. Method for manufacturing a sensor chip, the method comprising forming a plurality of electrode elements arranged at a first level on a substrate, at least one gap between neighbouring electrode elements, forming a metal structure arranged at a second level on the substrate, wherein the second level is different from the first level, and wherein the metal structure at least extends over an area of the second level that is defined by a projection of the at least one gap towards the second level, and

etching an insulating material that covers the electrode elements and at least part of the metal structure, wherein the etching is conducted using the electrode elements and at least part of the metal structure as an etch stops.

2. Method according to claim 1, wherein the insulating material is etched by means of an etchant applied for a predefined time.

3. Method according to claim 1, comprising the steps of

applying a protection layer to the electrode elements and at least the part of the metal structure, and

applying a measuring layer on top of the protection layer.

4. Method according to claim 1, wherein prior to etching the insulating material:

applying a first insulating layer on the substrate,

applying a first metal layer to the layer stack comprising at least the first insulating layer and the substrate,

structuring the first meal layer for building the metal structure,

applying a second insulating layer to the structured first metal layer,

applying a second metal layer to the second insulating layer,

structuring the second metal layer for building the electrode elements,

applying a third insulating layer to the structured second metal layer, and

applying the etching step.