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Soft error rate (SER) reduction in advanced silicon processes

  • US 8,633,109 B2
  • Filed: 02/22/2011
  • Issued: 01/21/2014
  • Est. Priority Date: 08/04/2010
  • Status: Active Grant
First Claim
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1. A method, comprising:

  • providing a substrate;

    forming a transistor at least partially in the substrate, the transistor having a channel region;

    forming a contact hole over the substrate; and

    forming a conductive contact in the contact hole using a 11B-enriched Boron material, wherein the forming the conductive contact includes;

    forming a Tungsten-containing seed layer in the contact hole through an atomic layer deposition (ALD) process, wherein the 11B-enriched Boron material is used as a precursor in the ALD process; and

    performing a chemical vapor deposition (CVD) process after the ALD process, the CVD process forming a Tungsten material on the Tungsten-containing seed layer; and

    wherein the forming the conductive contact is carried out in a manner so that the conductive contact is spaced apart from the channel region by less than about 0.5 microns.

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