Semiconductor device and method for manufacturing the same

• US 8,637,348 B2
• Filed: 07/24/2013
• Issued: 01/28/2014
• Est. Priority Date: 07/26/2010
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Endo, Yuta, Noda, Kosei, Sasaki, Toshinari
• Primary Examiner(s): PRENTY, MARK V
• Application Number:
  US13/949,329
• Publication Number:
  US 20130309822A1
• Time in Patent Office: 188 Days
• Field of Search: 438/104, 438/151, 257/43, 257/E29.296
• US Class Current: 438/104
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02367 Substrates
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An insulating layer which releases a large amount of oxygen is used as an insulating layer in contact with a channel region of an oxide semiconductor layer, and an insulating layer which releases a small amount of oxygen is used as an insulating layer in contact with a source region and a drain region of the oxide semiconductor layer. By releasing oxygen from the insulating layer which releases a large amount of oxygen, oxygen deficiency in the channel region and an interface state density between the insulating layer and the channel region can be reduced, so that a highly reliable semiconductor device having small variation in electrical characteristics can be manufactured. The source region and the drain region are provided in contact with the insulating layer which releases a small amount of oxygen, thereby suppressing the increase of the resistance of the source region and the drain region.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming an insulating layer including a first region and a second region;

forming an oxide semiconductor layer in contact with the first region and the second region;

forming a gate insulating layer in contact with the oxide semiconductor layer;

forming a gate electrode in contact with the gate insulating layer;

forming a source region and a drain region in the oxide semiconductor layer by reducing resistance of a part of the oxide semiconductor layer to be in contact with the second region; and

forming a channel region in the oxide semiconductor layer to be in contact with the first region,

wherein a composition of the first region is different from a composition of the second region.

2. The method for manufacturing a semiconductor device according to claim 1,

wherein the first region comprises silicon oxide, and

wherein the second region comprises silicon oxide, silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum nitride, or aluminum oxynitride.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the first region is formed by a sputtering method.

4. The method for manufacturing a semiconductor device according to claim 1, wherein a surface of the first region and a surface of the second region are coplanar with each other.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer is formed by a sputtering method.

6. The method for manufacturing a semiconductor device according to claim 1, wherein heat treatment at a temperature higher than or equal to 100°

C. and lower than or equal to 650°

C. is performed after the oxide semiconductor layer is formed.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the source region and the drain region are formed in the oxide semiconductor layer by reducing resistance of a part of the oxide semiconductor layer with the use of the gate electrode as a mask, and the channel region is formed in a part of the oxide semiconductor layer which is covered with the gate electrode.

8. The method for manufacturing a semiconductor device according to claim 1, further comprising the steps of:

forming an interlayer insulating layer over the gate electrode, and

forming a wiring over the interlayer insulating layer and in contact with the oxide semiconductor layer through an opening provided in the interlayer insulating layer.

9. The method for manufacturing a semiconductor device according to claim 1,

wherein the first region comprises silicon oxide in which the number of oxygen atoms is more than twice the number of silicon atoms per unit volume, and

wherein the second region comprises silicon oxide or silicon oxynitride whose number of oxygen atoms per unit volume is smaller than the number of oxygen atoms per unit volume of the first region.

10. The method for manufacturing a semiconductor device according to claim 1, wherein oxygen is released from the insulating layer and the gate insulating layer by heating.

11. The method for manufacturing a semiconductor device according to claim 1, wherein the insulating layer and the gate insulating layer comprise silicon oxide in which the number of oxygen atoms is more than twice the number of silicon atoms per unit volume.

12. The method for manufacturing a semiconductor device according to claim 1, wherein an amount of oxide deficiency in the channel region is lower than in the source region and the drain region.

13. The method for manufacturing a semiconductor device according to claim 1, wherein the first region contains oxygen at a higher concentration than the second region.

14. A method for manufacturing a semiconductor device, comprising the steps of:

selectively forming an insulating layer on an insulating surface;

forming an oxide semiconductor layer to extend beyond side surfaces of the insulating layer;

forming a gate insulating layer in contact with the oxide semiconductor layer;

forming a gate electrode in contact with the gate insulating layer;

forming a source region and a drain region in the oxide semiconductor layer by reducing resistance of part of the oxide semiconductor layer to be in contact with the insulating surface; and

forming a channel region in the oxide semiconductor layer to be in contact with the insulating layer.

15. The method for manufacturing a semiconductor device according to claim 14, wherein the insulating layer comprises silicon oxide.

16. The method for manufacturing a semiconductor device according to claim 14, wherein the insulating layer is formed by a sputtering method using oxygen or a mixed gas of oxygen and argon.

17. The method for manufacturing a semiconductor device according to claim 14, wherein the oxide semiconductor layer is formed by a sputtering method.

18. The method for manufacturing a semiconductor device according to claim 14, wherein heat treatment at a temperature higher than or equal to 100°

C. and lower than or equal to 650°

C. is performed after the oxide semiconductor layer is formed.

19. The method for manufacturing a semiconductor device according to claim 14, wherein the source region and the drain region are formed in the oxide semiconductor layer by reducing resistance of part of the oxide semiconductor layer with the use of the gate electrode as a mask, and the channel region is formed in part of the oxide semiconductor layer which is covered with the gate electrode.

20. The method for manufacturing a semiconductor device according to claim 14, further comprising the steps of:

forming an interlayer insulating layer over the gate electrode, and

forming a wiring over the interlayer insulating layer and in contact with the oxide semiconductor layer through an opening provided in the interlayer insulating layer.

21. The method for manufacturing a semiconductor device according to claim 14, wherein oxygen is released from the insulating layer and the gate insulating layer by heating.

22. The method for manufacturing a semiconductor device according to claim 14, wherein the insulating layer and the gate insulating layer comprise silicon oxide in which the number of oxygen atoms is more than twice the number of silicon atoms per unit volume.

23. The method for manufacturing a semiconductor device according to claim 14, wherein an amount of oxide deficiency in the channel region is lower than in the source region and the drain region.