Memory system with data line switching scheme

• US 8,638,586 B2
• Filed: 05/23/2012
• Issued: 01/28/2014
• Est. Priority Date: 04/20/2009
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk 3D LLC (Western Digital Corporation)
• Inventors: Yan, Tianhong, Fasoli, Luca
• Primary Examiner(s): Ho, Hoai V
• Assistant Examiner(s): Norman, James G
• Application Number:
  US13/479,145
• Publication Number:
  US 20120257433A1
• Time in Patent Office: 615 Days
• Field of Search: None
• US Class Current: 365/51
• CPC Class Codes: G11C 13/0064 Verifying circuits or methods
• CPC Class Codes: G11C 13/0069 Writing or programming circuits or methods
• CPC Class Codes: G11C 2013/0066 Verify correct writing whilst writing is in progress, e.g. by detecting onset or cessation of current flow in cell and using the detector output to terminate writing
• CPC Class Codes: G11C 8/12 Group selection circuits, e.g. for memory block selection, chip selection, array selection

Abstract

A storage system includes a three-dimensional memory array that has multiple layers of non-volatile storage elements grouped into blocks. Each block includes a subset of first selection circuits for selectively coupling a subset of array lines (e.g. bit lines) of a first type to respective local data lines. Each block includes a subset of second selection circuits for selectively coupling a subset of the respective local data lines to global data lines that are connected to control circuitry. To increase the performance of memory operations, the second selection circuits can change their selections independently of each other.

Claims

1. A non-volatile storage device, comprising:

a plurality of non-volatile storage elements;

one or more control circuits that perform memory operations;

a first set of selection circuits, each selection circuit of the first set of selection circuits is in communication with the one or more control circuits and a different group of two or more of the non-volatile storage elements, each of the selection circuits of the first set of selection circuits concurrently connect a respective first non-volatile storage element of respective groups of the non-volatile storage elements to the one or more control circuits for concurrently performing a memory operation on the first non-volatile storage element of each group, the selection circuits independently detect completion of the memory operation for the first non-volatile storage element of each group, the selection circuits commence for each group another memory operation on a second non-volatile storage element for the respective group independently of the detection of completion of the memory operation for the first non-volatile storage elements of the other groups and in response to the independent detection of completion of the memory operation for the first non-volatile storage element of the respective group;

multiple sets of local data lines, each group of non-volatile storage elements includes its own set of local data lines; and

a set of global data lines, the one or more control circuits are in communication with the global data lines, the first set of selection circuits selectively connect the local data lines to the global data lines, the local data lines are positioned in at least one metal layer below the plurality of non-volatile storage elements, the global data lines are positioned in at least one metal layer above the plurality of non-volatile storage elements.

2. The non-volatile storage device of claim 1, wherein:

the one or more control circuits include sense amplifier circuits;

the sense amplifier circuits determine, independently for each non-volatile storage element being monitored, that the memory operation completes and outputs a signal in response to determing that the memory operation completes; and

the first set of selections circuits include multiplexer circuits that each receive the signal from one of the sense amplifier circuits and switch connections from the first non-volatile storage element of the group to the second non-volatile storage element of the group.

3. The non-volatile storage device of claim 2, wherein:

each selection circuit of the first set of selection circuits is in communication with a different group of two or more of the local data lines and one of the global data lines so that during memory operations each selection circuit of the first set of selection circuits selectively connects a respective first local data line to one global data line until the memory operation completes for the first non-volatile storage elements of the group and then selectively connects a second local data line to the one global data line independent of other selection circuits of the first set of selection circuits.

4. The non-volatile storage device of claim 3, wherein:

the local data lines are outside the plurality of groups of non-volatile storage element; and

the global data lines are positioned outside of the plurality of non-volatile storage elements.

5. The non-volatile storage device of claim 1, wherein:

the control circuitry is positioned on a surface of a substrate;

the plurality of non-volatile storage elements comprise a monolithic three-dimensional memory array positioned above the surface of the substrate and above the control circuitry;

the local data lines are positioned between the monolithic three-dimensional memory array and the surface of the substrate; and

the global data lines are positioned above the monolithic three-dimensional memory array and the surface of the substrate.

6. The non-volatile storage device of any of claim 1, wherein:

when the respective first non-volatile storage element of a group of non-volatile storage elements is connected to the one or more control circuits, the one or more control circuits SET the resistance of the respective first non-volatile storage element of the group by discharging a capacitive charge through the respective first non-volatile storage element of the group.

7. The data storage system of any of claim 1, wherein:

each non-volatile storage elements of the plurality of non-volatile storage elements includes a reversible resistance-switching element.

8. A non-volatile storage device, comprising:

a plurality of groups of non-volatile storage elements;

means for concurrently performing a memory operation on a first non-volatile storage element of each group of the plurality of groups of non-volatile storage elements;

means for independently detecting completion of the memory operation for the first non-volatile storage element of each group;

means for commencing, for each group, another memory operation on a second non-volatile storage element of the group independently of the detection of completion of the memory operation for the first non-volatile storage elements of the other groups and in response to the independent detection of completion of the memory operation for the first non-volatile storage element of the group;

multiple sets of local data lines, each group of the plurality of groups of non-volatile storage elements is associated with a set of local data lines of the multiple sets of local data lines; and

a set of global data lines, the means for concurrently performing the memory operation selectively connects the set of local data lines to the set of global data lines, the set of local data lines is positioned in at least one metal layer below the plurality of groups of non-volatile storage elements, the set of global data lines is positioned in at least one metal layer above the plurality of groups of non-volatile storage elements.

9. The non-volatile storage device of claim 8, wherein:

the means for concurrently performing the memory operation on the first non-volatile storage element of each group includes means for selectively connecting the first non-volatile storage element of each group to control circuitry and performing a memory operation on the connected first non-volatile storage element of each group using the control circuitry;

the means for independently detecting completion of the memory operation for the first non-volatile storage element of each group include the control circuitry; and

the means for commencing another memory operation on the second non-volatile storage element of the group comprises means for disconnecting the first non-volatile storage element for each group from the control circuitry, connecting the second non-volatile storage element for each group to the control circuitry and performing the memory operation on the connected second non-volatile storage element of each group using the control circuitry, all commenced independently for each group after independently detecting completion of the memory operation for the connected first non-volatile storage element of each group.

10. The non-volatile storage device of claim 8, wherein:

the plurality of groups of non-volatile storage elements includes sixteen groups of non-volatile storage elements;

each of the groups of non-volatile storage elements includes two reversible resistance-switching non-volatile storage elements;

the means for concurrently performing the memory operation on the first non-volatile storage element of each group comprises means for changing a resistance of up to sixteen reversible resistance-switching non-volatile storage elements;

the means for independently detecting completion of the memory operation for the first non-volatile storage element of each group includes detecting change in resistance of the up to sixteen reversible resistance-switching non-volatile storage elements at different times; and

the means for commencing another memory operation on the second non-volatile storage element of the group comprises means for commencing an operation to change resistance of up to sixteen different reversible resistance-switching non-volatile storage elements at different times.

11. The non-volatile storage device of claim 8, wherein the non-volatile storage elements are reversible resistance-switching non-volatile storage elements, and the means for concurrently performing the memory operation comprises:

means for applying a charge to a control line connected to a reversible resistance-switching non-volatile storage element for a first period of time that is insufficient to change the reversible resistance-switching non-volatile storage element from a first predetermined resistance state to a second predetermined resistance state; and

means for, after the first period of time, allowing the control line to discharge the applied charge through the reversible resistance-switching non-volatile storage element in order to change the reversible resistance-switching non-volatile storage element from the first predetermined resistance state to the second predetermined resistance state, the detecting completion of the memory operation includes detecting the change from the first predetermined resistance state to the second predetermined resistance state.

12. The non-volatile storage device of claim 8, wherein:

the means for concurrently performing the memory operation includes means for concurrently changing resistance of multiple reversible resistance-switching non-volatile storage elements in a monolithic three-dimensional memory array.