Systems and methods for secure transaction management and electronic rights protection

• US 8,639,625 B1
• Filed: 07/30/2007
• Issued: 01/28/2014
• Est. Priority Date: 02/13/1995
• Status: Expired due to Fees

• Current Assignee: Intertrust Technologies Corporation (Fidelio Acquisition Co LLC)
• Original Assignee: Intertrust Technologies Corporation (Fidelio Acquisition Co LLC)
• Inventors: Ginter, Karl L., Shear, Victor H., Sibert, W. Olin, Spahn, Francis J., Van Wie, David M.
• Primary Examiner(s): Hewitt, II, Calvin L
• Assistant Examiner(s): Winter, John M
• Application Number:
  US11/888,123
• Time in Patent Office: 2,374 Days
• Field of Search: 705/51
• US Class Current: 705/51
• CPC Class Codes: G06F 21/1078 Logging; Metering
• CPC Class Codes: G06F 21/1082 Backup or restore
• CPC Class Codes: G06F 21/109 by using specially-adapted hardware at the client
• CPC Class Codes: G06F 21/16 Program or content traceability, e.g. by watermarking
• CPC Class Codes: G06F 21/42 using separate channels for security data
• CPC Class Codes: G06F 21/51 at application loading time, e.g. accepting, rejecting, starting or inhibiting executable software based on integrity or source reliability
• CPC Class Codes: G06F 21/57 Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
• CPC Class Codes: G06F 21/572 Secure firmware programming, e.g. of basic input output system [BIOS]
• CPC Class Codes: G06F 21/608 Secure printing
• CPC Class Codes: G06F 21/71 to assure secure computing or processing of information
• CPC Class Codes: G06F 21/725 operating on a secure reference time value
• CPC Class Codes: G06F 21/73 by creating or determining hardware identification, e.g. serial numbers
• CPC Class Codes: G06F 21/74 operating in dual or compartmented mode, i.e. at least one secure mode
• CPC Class Codes: G06F 21/78 to assure secure storage of data address-based protection against unauthorised use of memory G06F12/14; record carriers for use with machines and with at least a part designed to carry digital markings G06K19/00
• CPC Class Codes: G06F 21/86 Secure or tamper-resistant housings
• CPC Class Codes: G06F 21/87 by means of encapsulation, e.g. for integrated circuits
• CPC Class Codes: G06F 2221/034 Test or assess a computer or a system
• CPC Class Codes: G06F 2221/2101 Auditing as a secondary aspect
• CPC Class Codes: G06F 2221/2105 Dual mode as a secondary aspect
• CPC Class Codes: G06F 2221/2135 Metering
• CPC Class Codes: G06F 2221/2137 : Time limited access, e.g. to a computer or data
• CPC Class Codes: G06F 2221/2141 : Access rights, e.g. capability lists, access control lists, access tables, access matrices
• CPC Class Codes: G06F 2221/2143 : Clearing memory, e.g. to prevent the data from being stolen
• CPC Class Codes: G06F 2221/2147 : Locking files
• CPC Class Codes: G06F 2221/2149 : Restricted operating environment
• CPC Class Codes: G06F 2221/2151 : Time stamp
• CPC Class Codes: G06Q 10/10 : Office automation; Time management
• CPC Class Codes: G06Q 20/02 : involving a neutral party, e.g. certification authority, notary or trusted third party [TTP]
• CPC Class Codes: G06Q 20/06 : Private payment circuits, e.g. involving electronic currency used among participants of a common payment scheme
• CPC Class Codes: G06Q 20/10 : specially adapted for electronic funds transfer [EFT] systems; specially adapted for home banking systems
• CPC Class Codes: G06Q 20/12 : specially adapted for electronic shopping systems
• CPC Class Codes: G06Q 20/1235 : with control of digital rights management [DRM]
• CPC Class Codes: G06Q 20/24 : Credit schemes, i.e. "pay after"
• CPC Class Codes: G06Q 20/382 : insuring higher security of transaction
• CPC Class Codes: G06Q 30/06 : Buying, selling or leasing transactions
• CPC Class Codes: G07F 9/026 : for alarm, monitoring and auditing in vending machines or means for indication, e.g. when empty
• CPC Class Codes: H04L 63/00 : Network architectures or network communication protocols for network security cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00; network architectures or network communication protocols for wireless network security H04W12/00; security arrangements for protecting computers or computer systems against unauthorised activity G06F21/00
• CPC Class Codes: H04L 63/101 : Access control lists [ACL]
• CPC Class Codes: H04N 21/2347 : involving video stream encryption
• CPC Class Codes: H04N 21/2541 : Rights Management protecting software against unauthorised usage in a vending or licensing environment G06F21/10; security in data switching network management H04L41/28; security management or policies for network security H04L63/20; access security in wireless networks H04W12/08
• CPC Class Codes: H04N 21/26613 : for generating or managing keys in general key distribution for secret or secure communication involving central third party, e.g. key distribution center [KDC] or trusted third party [TTP] H04L9/083; network support of key management H04L63/06; key management for network security in communication control or processing H04W12/04
• CPC Class Codes: H04N 21/4405 : involving video stream decryption
• CPC Class Codes: H04N 21/4623 : Processing of entitlement messages, e.g. ECM [Entitlement Control Message] or EMM [Entitlement Management Message] arrangements for conditional access to broadcast information or to broadcast-related services H04H60/14
• CPC Class Codes: H04N 21/4627 : Rights management associated to the content security in data switching network management H04L41/28; security management or policies for network security H04L63/20; access security in wireless networks H04W12/08
• CPC Class Codes: H04N 21/8355 : involving usage data, e.g. number of copies or viewings allowed

Abstract

The present invention provides systems and methods for electronic commerce including secure transaction management and electronic rights protection. Electronic appliances such as computers employed in accordance with the present invention help to ensure that information is accessed and used only in authorized ways, and maintain the integrity, availability, and/or confidentiality of the information. Secure subsystems used with such electronic appliances provide a distributed virtual distribution environment (VDE) that may enforce a secure chain of handling and control, for example, to control and/or meter or otherwise monitor use of electronically stored or disseminated information. Such a virtual distribution environment may be used to protect rights of various participants in electronic commerce and other electronic or electronic-facilitated transactions. Secure distributed and other operating system environments and architectures, employing, for example, secure semiconductor processing arrangements that may establish secure, protected environments at each node. These techniques may be used to support an end-to-end electronic information distribution capability that may be used, for example, utilizing the “electronic highway.”

Claims

1. A system comprising:

a host processing system comprising a central processing unit;

mass storage operatively connected to said central processing unit

a clock, wherein the value of the clock comprises high-order bits and low-order bits and the high-order bits change on time intervals of at least one hour;

a storage location containing an encrypted form of an expected execution time duration for a predetermined sequence of instructions; and

main memory operatively, connected to said central processing unit, wherein the main memory comprises instructions that, when executed by the central processing unit perform the following steps;

reading a first value of the clock prior to executing the predetermined sequence of instructions whose expected execution time duration is stored in encrypted form in the storage location;

executing the predetermined sequence of instructions whose expected execution time duration is stored in encrypted form in the storage location;

reading a second value of the clock subsequent to executing the predetermined sequence of instructions whose expected execution time duration is stored in encrypted form in the storage location;

calculating the actual execution time duration of the predetermined sequence of instructions by determining a difference between the first value of the clock and the second value of the clock;

separating the high-order bits of the second value of the clock from the low-order bits of the second value of the clock to form a first portion of the second value of the clock;

decrypting the encrypted form of the expected execution time duration of the predetermined sequence of instructions stored in the storage location with a decryption key comprising at least in part the first portion of the second value of the clock;

generating an unencrypted form of the expected execution time duration of the predetermined sequence of instructions and generating both the unencrypted form of the expected execution time duration and the actual execution time duration each at least in part from the second value of the clock; and

indicating whether the unencrypted form of the expected execution time duration of the predetermined sequence of instructions matches the actual execution time duration of the predetermined sequence of instructions.

2. A system as in claim 1, wherein the main memory further comprises instructions that, when executed by the central processing unit, perform the following steps:

encrypting the actual execution time duration with an encryption key formed at least in part from the first portion of the second value of the clock value thereby generating an encrypted form of the actual execution time duration; and

storing the encrypted form of the actual execution time duration in the storage location.

3. A system as in claim 2, said storage location further comprising:

a disk sector marked as damaged.

4. A system as in claim 2, said storage location further comprising:

a disk sector designated as an alternative disk sector to be used to replace disk sectors marked as damaged.

5. A system as in claim 2, wherein said storage location further comprises:

a disk sector normally reserved for non-general purpose use.

6. A system as in claim 5, wherein said disk sector further comprises:

a disk sector reserved for firmware storage.

7. A system as in claim 5, wherein said disk sector further comprises:

a disk sector reserved for storage of information generated during testing.

8. A system as in claim 2, wherein said storage location further comprises:

a storage location on a writeable, non-volatile semiconductor memory device, said storage location normally allocated for configuration data.

9. A system as in claim 2, wherein said storage location further comprises:

a storage location on a writeable, non-volatile semiconductor memory device, said storage location normally allocated for firmware.

10. A system as in claim 2, wherein said storage location further comprises:

a storage location on a writeable, non-volatile semiconductor memory device, said storage location normally allocated for BIOS.

11. A system as in claim 2, wherein said storage location further comprises:

one or more memory locations allocated by an operating system to a file, but not used by such file.

12. A system as in claim 2, wherein said storage location further comprises an unused storage location allocated to a file allocation map.

13. A system as in claim 2, wherein said storage location further comprises an unused storage location allocated to a directory.

14. A system as in claim 1, further comprising:

one or more secure containers comprising secure contents and one or more rules or controls governing the use of said secure contents.

15. A processing apparatus including

a central processing unit;

main memory;

a clock, wherein the value of the clock comprises high-order bits and low-order bits and the high-order bits change on time intervals of at least one hour;

mass storage storing an encrypted form of an expected execution time duration for a predetermined sequence of instructions and tamper-resistant software designed to be loaded into said main memory and executed by said central processing unit, said tamper-resistant software including instructions that when executed cause the central processing unit to perform the steps of;

generating values required for correct operation of at least certain functions of said processing apparatus, said values being generated pursuant to an algorithm which operates so as to render said values at least somewhat resistant to discovery by an unauthorized observer;

using values from said clock to compare the duration of execution of said value generation programming to an expected value or range and set an indication depending on the result of said comparison by executing the following steps;

reading a first value of the clock prior to executing the predetermined sequence of instructions whose expected execution time duration is stored in encrypted form in the mass storage;

executing the predetermined sequence of instructions whose expected execution time duration is stored in encrypted form in the mass storage;

reading a second value of the clock subsequent to executing the predetermined sequence of instructions whose expected execution time duration is stored in encrypted form in the mass storage and calculating the actual execution time duration of the predetermined sequence of instructions by determining a difference between the first value of the clock and the second value of the clock;

separating the high-order bits of the second value of the clock from the low-order bits of the second value of the clock to form a first portion of the second value of the, clock

decrypting the encrypted form of the expected execution time duration of the predetermined sequence of instructions stored in the mass storage with a decryption key comprising at least in part the first portion of the second value of the clock;

generating an unencrypted form of the expected execution time duration of the predetermined sequence of instructions, and generating both the unencrypted form of the expected execution time duration and the actual execution time duration each at least in part from the second value of the clock; and

indicating whether the unencrypted form of the expected execution time duration of the predetermined sequence of instructions matches the actual execution time duration of

the predetermined sequence of instructions; and

checking said indication and undertaking one or more security-related actions dependent on the state of said indication.

16. A processing apparatus as in claim 15, in which said one or more actions include at least temporarily halting further processing if said indicator is set.

17. A processing apparatus as in claim 15, in which said one or more actions include at least temporarily disabling certain functions if said indicator is set.

18. A processing apparatus as in claim 15, in which said one or more action include at least initiating communication with a second processing apparatus if said indicator is set.