In-situ defect reduction techniques for nonpolar and semipolar (Al, Ga, In)N

• US 8,643,024 B2
• Filed: 12/20/2011
• Issued: 02/04/2014
• Est. Priority Date: 05/09/2006
• Status: Active Grant

• Current Assignee: Regents of the University of California (University of California)
• Original Assignee: Regents of the University of California (University of California)
• Inventors: Chakraborty, Arpan, Kim, Kwang-Choong, Speck, James S., DenBaars, Steven P., Mishra, Umesh K.
• Primary Examiner(s): DIALLO, MAMADOU L
• Application Number:
  US13/331,973
• Publication Number:
  US 20120091467A1
• Time in Patent Office: 777 Days
• Field of Search: 257/76, 257/79, 257/190, 257/615, 257/E29.089, 438/478, 438/689, 438/483
• US Class Current: 257/76
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/02516 Crystal orientation
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 33/007 comprising nitride compounds

Abstract

A method for growing reduced defect density planar gallium nitride (GaN) films is disclosed. The method includes the steps of (a) growing at least one silicon nitride (SiN_x) nanomask layer over a GaN template, and (b) growing a thickness of a GaN film on top of the SiN_x nanomask layer.

Claims

1. A device structure, comprising:

a nanomask with openings on a nanometer scale; and

a III-nitride crystal grown on or above the nanomask, wherein;

the III-nitride crystal is a semi-polar or non-polar oriented III-nitride or Al_xGa_yIn_(1-x-y)N crystal, and

the III-nitride crystal has a reduced defect density as compared to a III-nitride crystal grown without the nanomask layer.

3. The device structure of claim 1, wherein the III-nitride crystal has a stacking fault density less than 3×

10⁵ cm<sup>−

1</sup> and a threading dislocation density less than 9×

10⁹ cm<sup>−

2</sup>.

4. The device structure of claim 1, wherein:

the III-nitride crystal has a crystalline quality characterized by an on-axis rocking curve having a full width at half maximum (FWHM) of;

no more than 0.29°

for φ

=0°

, or

no more than 0.25°

for φ

=90°

.

5. The device structure of claim 1, wherein:

the III-nitride crystal has a crystalline quality characterized by;

an on-axis rocking curve having a full width at half maximum (FWHM) of no more than 0.29°

for φ

=0° and

no more than 0.25°

for φ

=90°

; and

an off-axis rocking curve having a FWHM of less than 0.42°

.

6. The device structure of claim 1, wherein:

the III-nitride crystal has a crystalline quality characterized by an off-axis rocking curve having a full width at half maximum (FWHM) no more than 0.42°

(1508″

), 0.38°

(1375″

) and 0.33°

(1208″

) for (101), (201) and (102) reflections, respectively.

7. The device structure of claim 1, wherein a largest surface of the III-nitride crystal has a non-polar orientation or the III-nitride crystal is a nonpolar film or template.

8. The device structure of claim 7, further comprising an n-type doped III-nitride layer on the largest surface, wherein the n-type doped III-nitride layer has an electron mobility greater than 30 cm²/V-s.

9. The device structure of claim 7, wherein the electron mobility is no less than 167 cm²/V-s.

10. The device structure of claim 1, wherein the III-nitride crystal is a film or template and:

an optoelectronic or electronic device structure is grown on a largest surface of the III-nitride crystal, or

the III-nitride crystal comprises an optoelectronic or electronic device structure.

11. The device structure of claim 1, wherein:

the III-nitride crystal is a lateral epitaxial overgrowth on the nanomask, with the III-nitride crystal grown through the openings and laterally over the nanomask.

12. The device structure of claim 1, wherein the nanomask layer is on a substrate, III-nitride template, or III-nitride substrate.

13. The device structure of claim 12, wherein the substrate is spinel, sapphire, or silicon carbide.

14. The device structure of claim 12, wherein the substrate or template is gallium nitride.

15. The device structure of claim 1, wherein the nanomask has a thickness less than 1.5 nm.

16. The device structure of claim 1, wherein the nanomask layer helps in strain relaxation of the III-nitride crystal and the III-nitride crystal is a film having a thickness thicker than a nonpolar or semipolar III-nitride film grown without the nanomask layer.

17. The device structure of claim 1, wherein the III-nitride crystal has a non-polar a-plane orientation.

18. The device structure of claim 1, wherein the III-nitride crystal is gallium nitride.

19. The device of claim 1, wherein the nanomask comprises silicon nitride.

20. The device structure of claim 1, further comprising a stack including one or more additional nanomasks on or above the III-nitride crystal and one or more III-nitride layers between the additional nanomasks.

21. The device structure of claim 1, wherein the III-nitride crystal is an Aluminum containing film or template, further comprising an optoelectronic or electronic device structure with strain relaxation grown on, or comprising, the film or template.

22. The device structure of claim 1, wherein the III-nitride crystal is an Indium containing template or film, further comprising an optoelectronic or electronic device structure with strain relaxation grown on, or comprising, the film or template.

23. The device structure of claim 1, wherein the III-nitride crystal has a surface roughness of at most 0.6 nanometers over an area of 5 μ

m×

5 μ

m.

24. The device structure of claim 1, wherein the III-nitride crystal comprises a semipolar film or template or a largest surface of the III-nitride crystal has a semipolar orientation.

2. A device structure, comprising:

a nanomask with openings on a nanometer scale; and

a III-nitride crystal grown on or above the nanomask, wherein;

the III-nitride crystal is a non-polar oriented III-nitride or Al_xGa_yIn_(1-x-y)N crystal, and

the III-nitride crystal has a threading dislocation density less than 9×

10⁹ cm<sup>−

2</sup>.

25. A method of fabricating a III-nitride crystal, comprising:

growing, on a substrate, a nanomask with openings on a nanometer scale; and

growing a III-nitride crystal on or above the nanomask, wherein;

the III-nitride crystal is a non-polar or semi-polar oriented III-nitride or Al_xGa_yIn_(1-x-y)N crystal, and

the III-nitride crystal is grown through the openings and laterally over the nanomask to form the III-nitride crystal comprising a lateral epitaxial overgrowth.

26. The method of claim 25, further comprising growing the nanomask comprises depositing the nanomask'"'"'s material under conditions to obtain islands of the material.

27. The method of claim 26, wherein the material is silicon nitride and the method further comprises growing the silicon nitride islands at a temperature between 700°

C. and 1200°

C.

28. The method of claim 25, wherein the III-nitride crystal is gallium nitride comprising a first gallium nitride layer and a second gallium nitride layer grown at a higher temperature than the first gallium nitride layer.

29. The method of claim 28, wherein the first gallium nitride layer is grown at a temperature of 800°

C.-1000°

C. and a second gallium nitride layer grown at a temperature of 1000°

C.-1200°

C.

30. The method of claim 25, further comprising optimizing a thickness of the nanomask to maximize reduction in a defect density of the III-nitride crystal and obtain coalescence of the III-nitride crystal.

31. The method of claim 25, further comprising growing the nonpolar or semipolar III-nitride crystal as a film to a thickness thicker than a nonpolar or semipolar III-nitride film grown without the nanomask layer, wherein the nanomask layer helps in strain relaxation of the III-nitride crystal and reduces strain induced cracking in the nonpolar or semipolar III-nitride crystal.

32. The method of claim 25, wherein the nanomask and the III-nitride crystal are grown under conditions wherein the III-nitride crystal has a stacking fault density less than 3×

10⁵ cm<sup>−

1</sup>, a threading dislocation density less than 9×

10⁹ cm<sup>−

2</sup>, and a surface roughness of at most 0.6 nanometers over an area of 5 μ

m×

5 μ

m.