Control device of semiconductor device

• US 8,643,102 B2
• Filed: 09/10/2011
• Issued: 02/04/2014
• Est. Priority Date: 09/10/2010
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Hashimoto, Takayuki, Masunaga, Masahiro
• Primary Examiner(s): Lee, Cheung
• Assistant Examiner(s): JOY, JEREMY J
• Application Number:
  US13/229,675
• Publication Number:
  US 20120061722A1
• Time in Patent Office: 878 Days
• Field of Search: 257/E29.255, 257340-342, 257/E29.201
• US Class Current: 257/340
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/451 with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 23/4824 Pads with extended contours, e.g. grid structure, branch structure, finger structure
• CPC Class Codes: H01L 23/49562 for devices being provided for in H01L29/00
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 24/06 of a plurality of bonding areas
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 25/16 the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/7802 : Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7813 : with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7831 : with multiple gate structure FinFETs or MuGFETs H01L29/7855, thin film transistors H01L29/78645
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13062 : Junction field-effect transistor [JFET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H03K 17/063 : in field-effect transistor switches
• CPC Class Codes: H03K 2017/6878 : using multi-gate field-effect transistors

Abstract

A control device of a semiconductor device is provided. The control device of a semiconductor device is capable of reducing both ON resistance and feedback capacitance in a hollow-gate type planar MOSFET to which a second gate electrode is provided or a trench MOSFET to which a second gate electrode is provided. In the control device controlling driving of a hollow-gate type planar MOSFET to which a second gate electrode is provided or a trench MOSFET to which a second gate electrode is provided, a signal of tuning ON or OFF is outputted to a gate electrode in a state of outputting a signal of turning OFF to the second gate electrode.

Claims

1. A control device of a semiconductor device controlling driving of a semiconductor device, the control device comprising:

a semiconductor substrate;

a drain electrode formed on a rear surface of the semiconductor substrate;

a plurality of well regions formed on a surface of the semiconductor substrate;

a plurality of semiconductor regions formed on the surface of the semiconductor substrate in a region at a deeper position than the well regions and having a conductivity opposite to that of the well regions;

a plurality of source regions formed in the well regions;

a trench penetrating the source regions and the well regions and reaching a first semiconductor region;

a gate insulating film formed on a side surface and a bottom surface of the trench;

a first gate electrode formed on the gate insulating film;

a source electrode electrically connected to the source region;

a second gate electrode provided under the first gate electrode and connected to the first gate electrode and the first semiconductor region by an interposing insulating film portion;

a first gate electrode pad electrically connected to the first gate electrode;

a metal wiring electrically connected to the first gate electrode pad;

a second gate electrode pad electrically connected to the second gate electrode; and

a metal wiring electrically connected to the second gate electrode pad,

wherein a surface area of the metal wiring electrically connected to the first gate electrode pad is larger than a surface area of the metal wiring electrically connected to the second gate electrode pad,

wherein driving of the second gate electrode is controlled so that the second gate electrode is at a same potential as the source electrode when outputting a control signal of turning ON or OFF to the first gate electrode.

2. The control device of a semiconductor device according to claim 1,

wherein a control signal of turning ON is outputted to the second gate electrode upon controlling driving of turning ON the semiconductor device, after outputting a control signal of turning ON to the first gate electrode.

3. The control device of a semiconductor device according to claim 1,

wherein a control signal of turning OFF is outputted to the first gate electrode upon controlling driving of turning OFF the semiconductor device, after outputting a control signal of turning OFF to the second gate electrode.

4. The control device of a semiconductor device according to claim 1,

wherein the control device of a semiconductor device is mounted on one package together with the semiconductor device.

5. The control device of a semiconductor device according to claim 4,

wherein a conductor connecting the first gate electrode pad of the semiconductor device and the control device of a semiconductor device is arranged next to a conductor connecting the source electrode of the semiconductor device and the control device of a semiconductor device.

6. The control device of a semiconductor device according to claim 1,

wherein the control device of a semiconductor device is mounted on a power supply device that complementally controls turning ON and OFF of a first semiconductor device and a second semiconductor device connected in series between a voltage input terminal and a reference potential terminal, and flows a current to an inductance element connected to connection nodes of the first semiconductor device and the second semiconductor device for outputting a voltage made by converting a voltage applied to the voltage input terminal, thereby controlling driving of the first semiconductor device and the second semiconductor device.