Body-tied asymmetric N-type field effect transistor

• US 8,643,107 B2
• Filed: 01/07/2010
• Issued: 02/04/2014
• Est. Priority Date: 01/07/2010
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Sleight, Jeffrey W., Lin, Chung-Hsun, Chang, Josephine B., Chang, Leland
• Primary Examiner(s): DANG, PHUC T
• Application Number:
  US12/683,634
• Publication Number:
  US 20110163380A1
• Time in Patent Office: 1,489 Days
• Field of Search: 257/336, 257/344, 257/347, 257/E21.137, 257/E21.138, 438/302, 438/262, 438/525, 438/531, 438/549, 438/354
• US Class Current: 257/347
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 29/1083 with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/66659 with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
• CPC Class Codes: H01L 29/66772 Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates H01L29/66666 takes precedence; thin film FinFETs H01L29/66795
• CPC Class Codes: H01L 29/78615 with a body contact

Abstract

In one exemplary embodiment of the invention, an asymmetric N-type field effect transistor includes: a source region coupled to a drain region via a channel; a gate structure overlying at least a portion of the channel; a halo implant disposed at least partially in the channel, where the halo implant is disposed closer to the source region than the drain region; and a body-tie coupled to the channel. In a further exemplary embodiment, the asymmetric N-type field effect transistor is operable to act as a symmetric N-type field effect transistor.

Claims

1. An asymmetric N-type field effect transistor comprising:

a drain region;

a channel;

a source region coupled to the drain region via the channel;

a gate structure overlying at least a portion of the channel;

a halo implant disposed at least partially in the channel, where asymmetry in the asymmetric N-type field effect transistor is at least partially due to the halo implant being disposed closer to the source region than the drain region; and

a body-tie coupled to the channel, where the body-tie enables application of a bias to control body potential, where the asymmetric N-type field effect transistor operates as a symmetric N-type field effect transistor due to the body-tie and the halo implant.

2. The asymmetric N-type field effect transistor as in claim 1, where the halo implant is partially disposed in the source region.

3. The asymmetric N-type field effect transistor as in claim 1, where the halo implant is formed by an angled implant procedure.

4. The asymmetric N-type field effect transistor as in claim 3, where the angled implant procedure uses the gate structure to mask at least a portion of the drain region.

5. The asymmetric N-type field effect transistor as in claim 1, where the body-tie comprises at least one of:

an H-gate, a T-gate, a Schottky structure and a body-source tie.

6. The asymmetric N-type field effect transistor as in claim 1, where the asymmetric N-type field effect transistor comprises an asymmetric silicon-on-insulator N-type field effect transistor.

7. The asymmetric N-type field effect transistor as in claim 1, further comprising:

a source extension implant and a drain extension implant, where the source extension implant is coupled to the source region and the drain extension implant is coupled to the drain region, where the source extension implant and the drain extension implant are asymmetrically disposed with the source extension implant being larger than the drain extension implant.

8. A semiconductor device comprising a plurality of asymmetric N-type field effect transistors, where each one of the plurality of asymmetric N-type field effect transistors comprises a drain region, a channel, a source region coupled to the drain region via the channel, a gate structure overlying at least a portion of the channel, a halo implant disposed at least partially in the channel, and a body-tie coupled to the channel, where the body-tie enables application of a bias to control body potential, where asymmetry in the asymmetric N-type field effect transistor is at least partially due to the halo implant being disposed closer to the source region than the drain region, where the asymmetric N-type field effect transistor operates as a symmetric N-type field effect transistor due to the body-tie and the halo implant.

9. The semiconductor device as in claim 8, where the semiconductor device does not comprise a symmetric field effect transistor.

10. The semiconductor device as in claim 8, where the halo implant is formed by an angled implant procedure that uses the gate structure to mask at least a portion of the drain region.

11. The semiconductor device as in claim 8, where the body-tie comprises at least one of:

an H-gate, a T-gate, a Schottky structure and a body-source tie.

12. The semiconductor device as in claim 8, where the plurality of asymmetric N-type field effect transistors comprises a plurality of asymmetric silicon-on-insulator N-type field effect transistors.

13. The semiconductor device as in claim 8, where each one of the plurality of asymmetric N-type field effect transistors further comprises a source extension implant and a drain extension implant, where the source extension implant is coupled to the source region and the drain extension implant is coupled to the drain region, where the source extension implant and the drain extension implant are asymmetrically disposed with the source extension implant being larger than the drain extension implant.

14. An asymmetric N-type field effect transistor comprising a source region, a drain region, a P-type channel, a halo implant disposed at least partially in the P-type channel, a source extension implant, a drain extension implant, a gate structure and a body-tie, where the body-tie enables application of a bias to control body potential, where asymmetry in the asymmetric N-type field effect transistor is at least partially due to the halo implant being disposed closer to the source region than the drain region, where the asymmetric N-type field effect transistor operates as a symmetric N-type field effect transistor due to the body-tie and the halo implant, where the source extension implant is coupled to the source region and the drain extension implant is coupled to the drain region, where the source extension implant and the drain extension implant are asymmetrically disposed with the source extension implant being larger than the drain extension implant.

15. The asymmetric N-type field effect transistor as in claim 14, where the halo implant is partially disposed in the source region.

16. The asymmetric N-type field effect transistor as in claim 14, where the body-tie comprises at least one of:

an H-gate, a T-gate, a Schottky structure and a body-source tie.

17. The asymmetric N-type field effect transistor as in claim 14, where the asymmetric N-type field effect transistor comprises an asymmetric silicon-on-insulator N-type field effect transistor.

18. A semiconductor structure comprising a first asymmetric field effect transistor and a second asymmetric field effect transistor, where the first asymmetric field effect transistor and the second asymmetric field effect transistor are located within a same silicon island of the semiconductor structure,

where the first asymmetric field effect transistor comprises a drain region, a channel, a source region coupled to the drain region via the channel, a gate structure overlying at least a portion of the channel, a halo implant disposed at least partially in the channel, and a body-tie coupled to the channel,

where the first asymmetric field effect transistor is an asymmetric N-type field effect transistor, where asymmetry in the first asymmetric field effect transistor is at least partially due to the halo implant being disposed closer to the source region than the drain region, where the body-tie enables application of a bias to control body potential, where the first asymmetric field effect transistor operates as a symmetric N-type field effect transistor due to the body-tie and the halo implant, where the second asymmetric field effect transistor operates as an asymmetric field effect transistor.

19. The semiconductor structure as in claim 18, where the same silicon island does not comprise a symmetric field effect transistor.

20. The semiconductor structure as in claim 18, where the halo implant of the first asymmetric field effect transistor is partially disposed in the source region.

21. The semiconductor structure as in claim 18, where the body-tie of the first asymmetric field effect transistor comprises at least one of:

an H-gate, a T-gate, a Schottky structure and a body-source tie.

22. The semiconductor structure as in claim 18, where the first asymmetric field effect transistor comprises an asymmetric silicon-on-insulator N-type field effect transistor.

23. The semiconductor structure as in claim 18, where the first asymmetric field effect transistor further comprises a source extension implant and a drain extension implant, where the source extension implant is coupled to the source region and the drain extension implant is coupled to the drain region, where the source extension implant and the drain extension implant are asymmetrically disposed with the source extension implant being larger than the drain extension implant.