Powering a circuit by alternating power supply connections in series and parallel with a storage capacitor

• US 8,643,340 B1
• Filed: 09/29/2009
• Issued: 02/04/2014
• Est. Priority Date: 09/29/2009
• Status: Active Grant

• Current Assignee: Cirrus Logic Incorporated
• Original Assignee: Cirrus Logic Incorporated
• Inventors: Kamath, Gautham Devendra
• Primary Examiner(s): Fantu, Yalkew
• Application Number:
  US12/569,549
• Time in Patent Office: 1,589 Days
• Field of Search: 320/138
• US Class Current: 320/138
• CPC Class Codes: H02J 7/0024 Parallel/serial switching of connection of batteries to charge or load circuit
• CPC Class Codes: H02J 7/345 using capacitors as storage or buffering devices
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

An integrated circuit (IC) having an internal power supply voltage step down circuit provides efficiency while requiring a minimum of external terminals. In a first operating mode, a storage capacitor is charged from the power supply return of a group of circuits, while the group of circuits is powered from an input power supply voltage provided to the IC. In a second operating mode, the group of circuits is powered from the storage capacitor. The step-down circuit provides for halving the input power supply voltage, but multiple storage capacitors and additional operating modes can be provided for voltage division by greater factors. A sensing circuit can be employed to sense the voltage across the storage capacitor(s) and in response, select the operating mode, providing hysteretic control of the voltage supplied to the group of circuits.

Claims

1. A method of powering a group of circuits within an integrated circuit, the method comprising:

in a first operating mode for powering the group of circuits, charging a storage capacitor from a power supply return current of the group of circuits while the group of circuits is operated from a DC power supply by coupling the storage capacitor in series with the group of circuits and the DC power supply; and

in a second operating mode for powering the group of circuits, powering the group of circuits from the storage capacitor by coupling power supply connections of the group of circuits to the storage capacitor.

2. The method of claim 1, further comprising:

sensing when a voltage across the storage capacitor exceeds a first predetermined threshold;

responsive to sensing that the voltage across the storage capacitor exceeds the first predetermined threshold, selecting the second operating mode;

sensing when a voltage across the storage capacitor drops below a second predetermined threshold; and

responsive to sensing that the voltage across the storage capacitor drops below the second predetermined threshold, selecting the first operating mode.

3. The method of claim 1, further comprising selecting between the first operating mode and the second operating mode so that an average voltage across the storage capacitor remains substantially equal to half of a voltage of the DC power supply.

4. The method of claim 1, wherein the storage capacitor is a first storage capacitor, and further comprising:

in the second operating mode, charging a second storage capacitor from the power supply return current of the group of circuits while the group of circuits is operated from a voltage across the first storage capacitor; and

in a third operating mode for powering the group of circuits, powering the group of circuits from the second storage capacitor.

5. The method of claim 1, wherein the group of circuits is a group of digital logic circuits, and further comprising shifting levels of an output of the group of digital circuits in response to voltages at a power supply input and a corresponding power supply return of the group of circuits as the voltages change dynamically in response to selection of the first operating mode and the second operating mode.

6. The method of claim 5, wherein the shifting levels is performed by selectively applying the output of the group of digital circuits through one or more pass devices having gates controlled by the power supply input and the corresponding power supply return of the group of circuits, respectively.

7. The method of claim 1, further comprising:

in response to selection of the first operating mode, closing a first switch to couple a power supply input of the group of circuits to the DC power supply;

in response to selection of the first operating mode, closing a second switch to couple the power supply return of the group of circuits to the storage capacitor;

in response to selection of the second operating mode, opening the first switch and closing a third switch to couple the power supply input of the group of circuits to the storage capacitor; and

in response to selection of the second operating mode, opening the second switch and closing a fourth switch to couple the power supply return of the group of circuits to a power supply return of the DC power supply.

8. The method of claim 7, further comprising in response to selection of the first operating mode, opening the third and fourth switches.

9. An integrated circuit, comprising:

a power supply input terminal;

a common return terminal;

a group of circuits having a pair of common power supply connections including a power supply input and a corresponding power supply return;

at least one storage capacitor terminal for connection of at least one corresponding capacitor for storing energy for periodic operation of the group of circuits; and

a switching circuit for coupling the power supply connections of the group of circuits in series between the power supply input terminal and the at least one storage capacitor terminal in a first operating mode, whereby the group of circuits is powered from the power supply input terminal, and for coupling the pair of power supply connections of the group of circuits between the at least one storage capacitor terminal and the common return terminal in a second operating mode, whereby the group of circuits is powered from the at least one storage capacitor terminal in the second operating mode.

10. The integrated circuit of claim 9, further comprising:

a sense circuit having an input coupled to the at least one storage capacitor terminal for sensing a voltage of the at least one storage capacitor terminal; and

a control circuit having an input coupled to an output of the sense circuit and an output coupled to the switching circuit for selecting between the first operating mode and the second operating mode, wherein the control circuit selects the first operating mode when a magnitude of a voltage between the at least one storage capacitor terminal and the common return terminal falls below a predetermined threshold and selects the second operating mode when the magnitude of the voltage between the at least one storage capacitor terminal and the common return terminal rises above another predetermined threshold.

11. The integrated circuit of claim 9, wherein the at least one storage capacitor terminal is a single storage capacitor terminal, and wherein a first average voltage of the at least one storage capacitor terminal with respect to the common return terminal is substantially equal to half of a second average voltage of the power supply input terminal with respect to the common return terminal.

12. The integrated circuit of claim 9, wherein the at least one storage capacitor terminal comprises multiple storage capacitor terminals, and wherein in a third operating mode, the group of circuits is energized from the multiple storage capacitor terminals by coupling the power supply input of the group of circuits to a first one of the multiple storage capacitor terminals and coupling the corresponding power supply return of the group of circuits to a second one of the multiple storage capacitor terminals.

13. The integrated circuit of claim 9, further comprising a flying capacitor coupled between the power supply input of the group of circuits and the corresponding power supply return of the group of circuits.

14. The integrated circuit of claim 9, wherein the group of circuits is a group of digital logic circuits, and wherein the integrated circuit further comprises a level shifter for coupling an output of the group of digital logic circuits to another circuit, wherein the level shifter comprises:

a level shifter circuit having a positive power supply input coupled to a positive power supply of the another circuit and a negative power supply input coupled to a negative power supply of the another circuit;

a first N-channel pass transistor having drain-source connections coupled between a first input of the level shifter circuit and the output of the group of digital logic circuits, and a gate coupled to the power supply input of the group of digital logic circuits; and

a second P-channel pass transistor having drain-source connections coupled between a second input of the level shifter circuit and the output of the digital logic block, and a gate coupled to the power supply return of the group of digital logic circuits, whereby the output of the digital logic block is selectively applied to one or more inputs of the level-shifter circuit according to the present operating mode of the integrated circuit and an instantaneous voltage level of the output of the digital logic block.

15. The integrated circuit of claim 14, wherein the level shifter circuit comprises:

a pull-up half latch formed by cross-coupled connection of a first pair of transistors and having an input coupled to one of the drain-source connections of the first N-channel pass transistor, wherein an input of the pull-up half latch provides the first input of the level shifter circuit; and

a pull-down half latch formed by cross-coupled connection of a second pair of transistors and having an input coupled to one of the drain-source connections of the second P-channel pass transistor, wherein an input of the pull-down half latch provides the second input of the level shifter circuit.

16. The integrated circuit of claim 9, wherein the switching circuit comprises:

a first switch for coupling the power supply input terminal to the power supply input of the group of circuits block in the first operating mode;

a second switch for coupling the at least one storage capacitor terminal to the power supply input of the group of circuits in the second operating mode;

a third switch for coupling the storage capacitor terminal to the corresponding power supply return of the group of circuits in the first operating mode; and

a fourth switch for coupling the common return terminal to the corresponding power supply return of the group of circuits in the second operating mode.

17. The integrated circuit of claim 9, wherein the group of circuits includes analog circuits.

18. The integrated circuit of claim 9, wherein the group of circuits includes a processor core, and wherein the control circuit provides a signal to the processor core to indicate selection between the first operating mode and the second operating mode.

19. A circuit, comprising:

a power supply input;

a common return corresponding to the power supply input;

a group of circuits having a pair of common power supply connections including a group power supply input and a corresponding group power supply return;

at least one storage capacitor for storing energy for periodic operation of the group of circuits; and

a switching circuit for coupling the common power supply connections of the group of circuits in series between the power supply input and the at least one storage capacitor in a first operating mode, whereby the group of circuits is powered from the power supply input, and for coupling the pair of power supply connections of the group of circuits between the at least one storage capacitor and the common return in a second operating mode, whereby the group of circuits is powered from the at least one storage capacitor in the second operating mode.

20. The circuit of claim 19, further comprising:

a sense circuit having an input coupled to the at least one storage capacitor for sensing a voltage of the at least one storage capacitor; and

a control circuit having an input coupled to an output of the sense circuit and an output coupled to the switching circuit for selecting between the first operating mode and the second operating mode, wherein the control circuit selects the first operating mode when a magnitude of a voltage between the at least one storage capacitor and the common return falls below a predetermined threshold and selects the second operating mode when the magnitude of the voltage between the at least one storage capacitor and the common return rises above another predetermined threshold.

21. The circuit of claim 19, wherein the at least one storage capacitor comprises multiple storage capacitors, and wherein in a third operating mode, the group of circuits is energized from multiple storage capacitors by coupling the power supply input of the group of circuits to a first one of the multiple storage capacitors and coupling the corresponding power supply return of the group of circuits to a second one of the multiple storage capacitors.