Liquid crystal display device
First Claim
1. A semiconductor device comprising:
- first to fifth transistors; and
first to seventh wirings,wherein one of a source and a drain of the first transistor is electrically connected to the first wiring,wherein the other of the source and the drain of the first transistor is electrically connected to the second wiring,wherein one of a source and a drain of the second transistor is electrically connected to the third wiring,wherein the other of the source and the drain of the second transistor is electrically connected to the second wiring,wherein a gate of the second transistor is electrically connected to the fourth wiring,wherein one of a source and a drain of the third transistor is electrically connected to the fifth wiring,wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the first transistor,wherein a gate of the third transistor is electrically connected to the sixth wiring,wherein one of a source and a drain of the fourth transistor is electrically connected to the third wiring,wherein the other of the source and the drain of the fourth transistor is electrically connected to a gate of the first transistor,wherein a gate of the fourth transistor is electrically connected to the fourth wiring,wherein one of a source and a drain of the fifth transistor is electrically connected to the third wiring,wherein the other of the source and the drain of the fifth transistor is electrically connected to the second wiring, andwherein a gate of the fifth transistor is electrically connected to the seventh wiring.
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Accused Products
Abstract
A first transistor, a second transistor, a third transistor, a fourth transistor are provided. In the first transistor, a first terminal is electrically connected to a first wiring; a second terminal is electrically connected to a gate terminal of the second transistor; a gate terminal is electrically connected to a fifth wiring. In the second transistor, a first terminal is electrically connected to a third wiring; a second terminal is electrically connected to a sixth wiring. In the third transistor, a first terminal is electrically connected to a second wiring; a second terminal is electrically connected to the gate terminal of the second transistor; a gate terminal is electrically connected to a fourth wiring. In the fourth transistor, a first terminal is electrically connected to the second wiring; a second terminal is electrically connected to the sixth wiring; a gate terminal is connected to the fourth wiring.
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Citations
18 Claims
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1. A semiconductor device comprising:
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first to fifth transistors; and first to seventh wirings, wherein one of a source and a drain of the first transistor is electrically connected to the first wiring, wherein the other of the source and the drain of the first transistor is electrically connected to the second wiring, wherein one of a source and a drain of the second transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the second transistor is electrically connected to the second wiring, wherein a gate of the second transistor is electrically connected to the fourth wiring, wherein one of a source and a drain of the third transistor is electrically connected to the fifth wiring, wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the first transistor, wherein a gate of the third transistor is electrically connected to the sixth wiring, wherein one of a source and a drain of the fourth transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the fourth transistor is electrically connected to a gate of the first transistor, wherein a gate of the fourth transistor is electrically connected to the fourth wiring, wherein one of a source and a drain of the fifth transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the fifth transistor is electrically connected to the second wiring, and wherein a gate of the fifth transistor is electrically connected to the seventh wiring. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A semiconductor device comprising:
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first to fifth transistors; and first to seventh wirings, wherein one of a source and a drain of the first transistor is electrically connected to the first wiring, wherein the other of the source and the drain of the first transistor is electrically connected to the second wiring, wherein one of a source and a drain of the second transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the second transistor is electrically connected to the second wiring, wherein a gate of the second transistor is electrically connected to the fourth wiring, wherein one of a source and a drain of the third transistor is electrically connected to the fifth wiring, wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the first transistor, wherein a gate of the third transistor is electrically connected to the sixth wiring, wherein one of a source and a drain of the fourth transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the fourth transistor is electrically connected to a gate of the first transistor, wherein a gate of the fourth transistor is electrically connected to the fourth wiring, wherein one of a source and a drain of the fifth transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the fifth transistor is electrically connected to the second wiring, wherein a gate of the fifth transistor is electrically connected to the seventh wiring, and wherein a channel width of each of the second transistor, the third transistor, and the fourth transistor is smaller than a channel width of the first transistor. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A semiconductor device comprising:
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first to fourth transistors; and first to fifth wirings, wherein one of a source and a drain of the first transistor is electrically connected to the first wiring, wherein the other of the source and the drain of the first transistor is electrically connected to the second wiring, wherein one of a source and a drain of the second transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the second transistor is electrically connected to the second wiring, wherein a gate of the second transistor is electrically connected to the fourth wiring, wherein one of a source and a drain of the third transistor is electrically connected to the fifth wiring, wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the first transistor, wherein a gate of the third transistor is electrically connected to the fifth wiring, wherein one of a source and a drain of the fourth transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the fourth transistor is electrically connected to the gate of the first transistor, wherein a gate of the fourth transistor is electrically connected to the fourth wiring, and wherein a channel width of each of the second transistor, the third transistor, and the fourth transistor is smaller than a channel width of the first transistor. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification