Active current surge limiters with inrush current anticipation

• US 8,643,989 B2
• Filed: 09/12/2011
• Issued: 02/04/2014
• Est. Priority Date: 01/31/2005
• Status: Active Grant

• Current Assignee: I-EWM Acquisation, LLC
• Original Assignee: Georgia Tech Research Corporation (University System of Georgia)
• Inventors: Divan, Deepakraj Malhar
• Primary Examiner(s): PATEL, DHARTI HARIDAS
• Application Number:
  US13/230,346
• Publication Number:
  US 20120063043A1
• Time in Patent Office: 876 Days
• Field of Search: 361/93.1, 361/93.9, 361/58
• US Class Current: 361/58
• CPC Class Codes: H01H 9/542 Contacts shunted by static switch means
• CPC Class Codes: H01H 9/56 for ensuring operation of the switch at a predetermined point in the ac cycle
• CPC Class Codes: H02H 3/247 having timing means
• CPC Class Codes: H02H 9/001 limiting speed of change of electric quantities, e.g. soft switching on or off progressive control of electronic switches for eliminating interferences H03K17/16

Abstract

Active current surge limiters and methods of use are disclosed. One exemplary system, among others, comprises a current limiter, including an interface configured to be connected between a power supply and a load; a disturbance sensor, configured to monitor the power supply for a disturbance during operation of the load; and an activator, configured to receive a control signal from the disturbance sensor and to activate the current limiter based on the control signal.

Claims

1. A method for reducing inrush current to an electrical load in response to anticipation of the inrush current due to detection of a disturbance occurring within a quarter to one half cycle in an input AC power supply coupled to the electrical load, comprising the steps of:

at the initial application of power from the input AC power supply at start-up, limiting the current to the electrical load by connecting a current limiting impedance between the input AC power supply and the electrical load;

coupling the input AC power supply to the electrical load after startup by removing the current limiting impedance;

monitoring the voltage of the input AC power supply at a node between the current limiting impedance and the electrical load to detect a disturbance in the input AC power supply occurring within a quarter cycle to one half cycle of the AC power;

detecting a disturbance in the input AC power supply that would cause an inrush current to the electrical load after the disturbance has ended;

in response to detection of the beginning of a disturbance in the input AC power supply, connecting the current limiting impedance between the input AC power supply and the electrical load;

repeatedly monitoring the voltage of the input AC power supply at a node prior to the current limiting impedance to detect the end of the disturbance in the input AC power supply, while maintaining the current limiting impedance; and

in response to detection that the disturbance in the input AC power supply has ended by return of the voltage to a normal level, coupling the input AC power supply to the electrical load by removing the current limiting impedance,

whereby inrush current to the load is impeded at start-up and in response to detection of a disturbance in the input AC power supply.

2. The method of claim 1, wherein the disturbance in the input AC power supply is detected by sampling the line voltage via an A/D converter coupled to a programmed microcontroller.

3. The method of claim 1, wherein the disturbance in the input AC power supply is a voltage sag.

4. The method of claim 1, wherein the step of repeatedly monitoring the voltage of the input AC power supply is effected by a programmed microcontroller that executes a fast detection algorithm.

5. The method of claim 1, wherein the current limiting impedance is a negative temperature coefficient (NTC) resistor.

6. The method of claim 1, wherein the current limiting impedance is coupled in parallel with a relay having contacts that are in the open position during start-up of power provided to the electrical load and close in response to a control signal to couple the input AC power supply to the electrical load and bypass the impedance.

7. The method of claim 1, wherein the step of detecting a disturbance in the input AC power supply is effected by a load modeling circuit coupled to the input AC power supply that simulates characteristics of the electrical load based on the waveform of the AC power supply.

8. The method of claim 7, further comprising the steps of:

bypassing the current limiting impedance during normal operation of the input AC power supply as determined by the load modeling circuit;

coupling the input AC power supply to the electrical load through the current limiting impedance during a detected disturbance; and

detecting the end of the disturbance on the input AC power supply with the load modeling circuit.

9. The method of claim 7, wherein the step of coupling the input AC power supply to the electrical load is effected by a relay that bypasses the current limiting impedance upon closing of the relay contacts, and

wherein the relay is controlled by a relay activator circuit that controls activation of the coil of the relay by maintaining the contacts in the closed position during provision of a control signal.

10. The method of claim 9, wherein the control signal comprises signal pulses from the load modeling circuit that correspond to the cycles of AC power from the input power supply.

11. The method of claim 9, wherein the relay activator circuit comprises a retriggerable monostable multi-vibrator (MMV) circuit, and

wherein the signal pulses are operative to retrigger the MMV circuit during normal conditions on the input AC power supply and maintain the relay contacts closed,

whereby the relay contacts open if the signal pulses from the load modeling circuit are not provided to retrigger the MMV.

12. The method of claim 9, wherein the load modeling circuit further comprises an optocoupler for detecting the charging current pulse of the AC line voltage at line voltage peaks and providing the control signal as an output to the relay activator circuit.

13. The method of claim 7, wherein the load modeling circuit comprises a diode bridge, capacitor, and charging resistor having a time constant chosen to be similar to that of rectifier/capacitor circuit of the electrical load to simulate the operation of the electrical load.

14. The method of claim 7, wherein the load modeling circuit comprises a programmed microprocessor connected to receive signals representing the voltage of the input power supply provided from an analog-to-digital (A/D) converter, the microprocessor programmed to identify when the voltage falls outside a nominally acceptable boundary defined by a preset limit and carry out the steps of coupling the input AC power supply to the electrical load and connecting the current limiting impedance.

15. The method of claim 7, wherein the load modeling circuit comprises a programmed microprocessor connected to receive signals representing the voltage of the input power supply provided from an analog-to-digital (A/D) converter, the microprocessor carrying out the steps of connecting the current limiting impedance between the input AC power supply and the electrical load, removing the current limiting impedance, and coupling the input AC power supply to the electrical load after a predetermined time after the voltage returns to a normal level.

16. The method of claim 1, wherein the step of coupling the input AC power supply to the electrical load after startup by removing the current limiting impedance is effected after expiration of a predetermined time period after the start-up condition.

17. The method of claim 1, further comprising the step of providing a voltage clamping component at the point of connection of the input AC power supply for providing additional voltage surge protection for the electrical load and the current surge limiting apparatus.

18. The method of claim 1, wherein the current limiting impedance comprises a multistep impedance.

19. The method of claim 18, wherein the multistep impedance comprises a first resistor and a second resistor in series, and a semiconductor switch in parallel with the second resistor, and further comprising the steps of:

in response to determining that the inrush current exceeds a predetermined maximum level I_MAX, connecting the first resistor and second resistor to provide maximum impedance to inrush current,

in response to detection that the inrush current a below a first allowable level, bypassing the second resistor to allow higher current levels.

20. An apparatus for reducing inrush current to an electrical load in response to anticipation of the inrush current due to detection of a disturbance on an input AC power supply, comprising:

a selectively actuatable current-limiting impedance coupled between an input AC power supply and the electrical load, the current-limiting impedance comprising (a) an impedance, and (b) a relay in parallel with the impedance and having contacts that are in an open position to couple the input AC power supply to the electrical load through the impedance and close in response to a control signal to couple the input AC power supply to the electrical load and bypass the impedance; and

a control circuit that provides the control signal to open and close the relay, the control circuit operative to continuously monitor the voltage of the input AC power supply at a node between the current-limiting impedance and the electrical load occurring within a quarter cycle to one half cycle of the AC power so as to detect a disturbance;

the control circuit operative at the initial application of power from the input AC power supply at start-up to limit the current to the electrical load by connecting the current-limiting impedance between the input AC power supply and the electrical load;

the control circuit operative to couple the input AC power supply to the electrical load after startup by removing the current-limiting impedance;

the control circuit operative in response to detection of a disturbance in the input AC power supply to connect the current-limiting impedance between the input AC power supply and the electrical load;

the control circuit further operative to monitor the voltage of the input AC power supply at a node prior to the current limiting impedance to detect the end of the disturbance in the input AC power supply, while maintaining the current-limiting impedance; and

the control circuit further operative in response to detection that the disturbance in the input AC power supply has ended by return of the input voltage to a normal level, to couple the input AC power supply to the electrical load by removing the current-limiting impedance,

whereby inrush current to the load is impeded at start-up and in response to detection of a disturbance in the input AC power supply.

21. The apparatus of claim 20, wherein the disturbance in the input AC power supply is detected by sampling the line voltage via an A/D converter coupled to a programmed microcontroller.

22. The apparatus of claim 20, wherein the disturbance in the input AC power supply is a voltage sag.

23. The apparatus of claim 20, wherein the control circuit comprises a programmed microcontroller that executes a fast detection algorithm.

24. The apparatus of claim 20, wherein the current limiting impedance is a negative temperature coefficient (NTC) resistor.

25. The apparatus of claim 20, wherein the current limiting impedance is coupled in parallel with a relay having contacts that are in the open position during start-up of power provided to the electrical load and close in response to a control signal to couple the input AC power supply to the electrical load and bypass the impedance.

26. The apparatus of claim 20, wherein the control circuit is operative to detect a disturbance in the input AC power supply via a load modeling circuit coupled to the input AC power supply that simulates characteristics of the electrical load based on the waveform of the AC power supply.

27. The apparatus of claim 26, wherein the control circuit is further operative to:

bypass the current-limiting impedance during normal operation of the input AC power supply as determined by the load modeling circuit;

couple the input AC power supply to the electrical load through the current-limiting impedance during a detected disturbance; and

detect the end of the disturbance on the input AC power supply with the load modeling circuit.

28. The apparatus of claim 26, wherein the relay bypasses the current-limiting impedance upon closing of the relay contacts, and

further comprising a relay activator circuit that controls activation of the coil of the relay by maintaining the contacts in the closed position during provision of the control signal.

29. The apparatus of claim 28, wherein the control signal comprises signal pulses from the load modeling circuit that correspond to the cycles of AC power from the input power supply.

30. The apparatus of claim 29, wherein the relay activator circuit comprises a retriggerable monostable multi-vibrator (MMV) circuit, and

wherein the signal pulses are operative to retrigger the MMV circuit during normal conditions on the input AC power supply and maintain the relay contacts closed,

whereby the relay contacts open if the signal pulses from the load modeling circuit are not provided to retrigger the MMV.

31. The apparatus of claim 28, wherein the load modeling circuit further comprises an optocoupler for detecting the charging current pulse of the AC line voltage at line voltage peaks and providing the control signal as an output to the relay activator circuit.

32. The apparatus of claim 26, wherein the load modeling circuit comprises a diode bridge, capacitor, and charging resistor having a time constant chosen to be similar to that of rectifier/capacitor circuit of the electrical load to simulate the operation of the electrical load.

33. The apparatus of claim 26, wherein the load modeling circuit comprises a programmed microprocessor connected to receive signals representing the voltage of the input power supply provided from an analog-to-digital (A/D) converter, the microprocessor programmed to identify when the voltage falls outside a nominally acceptable boundary defined by a preset limit and carry out the steps of coupling the input AC power supply to the electrical load and connecting the current limiting impedance.

34. The apparatus of claim 26, wherein the load modeling circuit comprises a programmed microprocessor connected to receive signals representing the voltage of the input power supply provided from an analog-to-digital (A/D) converter, the microprocessor carrying out the steps of connecting the current limiting impedance between the input AC power supply and the electrical load, removing the current limiting impedance, and coupling the input AC power supply to the electrical load after a predetermined time after the voltage returns to a normal level.

35. The apparatus of claim 20, wherein the control circuit is operative to couple the input AC power supply to the electrical load after startup by removing the current limiting impedance after expiration of a predetermined time period after the start-up condition.

36. The apparatus of claim 20, further comprising a voltage clamping component at the point of connection of the input AC power supply for providing additional voltage surge protection for the electrical load and the current surge limiting apparatus.

37. The apparatus of claim 20, wherein the current limiting impedance comprises a multistep impedance.

38. The apparatus of claim 37, wherein the multistep impedance comprises a first resistor and a second resistor in series, and a semiconductor switch in parallel with the second resistor,

wherein the control circuit is operative in response to determining that the inrush current exceeds a predetermined maximum level I_MAX to connecting the first resistor and second resistor to provide maximum impedance to inrush current;

and

wherein the control circuit is operative in response to detection that the inrush current a below a first allowable level to bypass the second resistor to allow higher current levels.