Run-time testing of memory locations in a non-volatile memory

• US 8,645,776 B2
• Filed: 03/24/2010
• Issued: 02/04/2014
• Est. Priority Date: 03/24/2010
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Byom, Matthew, Post, Daniel J., Herman, Kenneth, Khmelnitsky, Vadim
• Primary Examiner(s): BRITT, CYNTHIA H
• Application Number:
  US12/730,564
• Publication Number:
  US 20110239065A1
• Time in Patent Office: 1,413 Days
• Field of Search: 714/718, 714/723, 714/763
• US Class Current: 714/723
• CPC Class Codes: G11C 16/04 using variable threshold transistors, e.g. FAMOS
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 29/42 using error correcting codes [ECC] or parity check
• CPC Class Codes: G11C 29/44 Indication or identification of errors, e.g. for repair
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents
• CPC Class Codes: G11C 29/82 for EEPROMs

Abstract

Systems and methods are disclosed for performing run-time tests on a non-volatile memory (“NVM”), such as flash memory. The run-time tests may be tests that are performed on the NVM while the NVM can be operated by an end user (as opposed to during a manufacturing phase). In some embodiments, a controller for the NVM may detect an error event that may be indicative of a systemic failure of a die of the NVM. The controller may then select one or more blocks in the die to test, which may be dies that are currently not being used to store user data. The controller may post process the results of the test to determine whether there is a systemic failure, such as a column failure, and may treat the systemic failure if there is one.

Claims

1. A method of managing a non-volatile memory using a processor, wherein the non-volatile memory comprises at least one die having a plurality of blocks, the method comprising:

maintaining error characteristics of the non-volatile memory;

detecting an error event indicative of a systematic failure of a die of the non-volatile memory, wherein the detecting comprises identifying a criterion in the error characteristics;

responsive to the detecting, selecting at least one unused block in the die;

performing a run-time test on the selected at least one unused block; and

managing the die of the non-volatile memory based on results of the run-time test.

2. The method of claim 1, wherein maintaining the error characteristics comprises at least one:

recording addresses of where error events are occurring in the die, keeping track of the bit error rate of the die, keeping track of the bit error rate of at least one of the blocks in the die, keeping track of the number of program or erase failures in a predetermined number of attempts, and keeping track of the number of uncorrectable error events in different blocks of the die.

3. The method of claim 1, wherein the detecting comprises detecting a pattern of errors in at least one block in the die.

4. The method of claim 1, further comprising:

performing garbage collection on another block of the die to free the block for the run-time test, wherein performing the run-time test comprises testing the another block.

5. The method of claim 1, wherein the performing comprises performing a plurality of iterations, each of the iterations comprising:

programming the at least one unused block with a predetermined pattern;

reading the at least one unused block to verify the accuracy of the programming; and

erasing the at least one unused block.

6. The method of claim 1, further comprising:

determining, based on the run-time test, whether the error event is likely caused by a block-specific error or a die-wide error, wherein the managing is performed based on the determining.

7. A non-transitory computer readable medium for controlling an electronic device comprising a non-volatile memory, wherein the non-volatile memory comprises at least one die having a plurality of blocks, the non-transitory computer readable medium comprising computer-readable code recorded thereon, the computer readable code comprising:

a first instruction code for maintaining error characteristics of the non-volatile memory;

a second instruction code for detecting an error event indicative of a systematic failure of a die of the non-volatile memory, wherein the detecting comprises identifying a criterion in the error characteristics;

a third instruction code for selecting at least one unused block in the die responsive to the detecting;

a fourth instruction code for performing a run-time test on the selected at least one unused block; and

a fifth instruction code for managing the die of the non-volatile memory based on results of the run-time test.

8. The non-transitory computer readable medium of claim 7, wherein maintaining the error characteristics comprises at least one:

recording addresses of where error events are occurring in the die, keeping track of the bit error rate of the die, keeping track of the bit error rate of at least one of the blocks in the die, keeping track of the number of program or erase failures in a predetermined number of attempts, and keeping track of the number of uncorrectable error events in different blocks of the die.

9. The non-transitory computer readable medium of claim 7, wherein the detecting comprises detecting a pattern of errors in at least one block in the die.

10. The non-transitory computer readable medium of claim 7, further comprising:

a sixth instruction code for performing garbage collection on another block of the die to free the block for the run-time test, wherein performing the run-time test comprises testing the another block.

11. The non-transitory computer readable medium of claim 7, wherein performing the run-time test comprises performing a plurality of iterations, each of the iterations comprising:

programming the at least one unused block with a predetermined pattern;

reading the at least one unused block to verify the accuracy of the programming; and

erasing the at least one unused block.

12. The non-transitory computer readable medium of claim 7, further comprising:

a sixth instruction code for determining, based on the run-time test, whether the error event is likely caused by a block-specific error or a die-wide error, wherein the managing is performed based on the determining.