Micro device transfer head

• US 8,646,505 B2
• Filed: 02/13/2012
• Issued: 02/11/2014
• Est. Priority Date: 11/18/2011
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: LuxVue Techonology Corporation (Apple Inc.)
• Inventors: Bibl, Andreas, Higginson, John A., Law, Hung-Fai Stephen, Hu, Hsin-Hua
• Primary Examiner(s): Chan, Sing P
• Application Number:
  US13/372,277
• Publication Number:
  US 20130127020A1
• Time in Patent Office: 729 Days
• Field of Search: 156/230, 156/235, 156/241, 156/249, 156/273.1, 156/273.7, 156/711, 156538-542, 156/556, 156/558, 156/569, 156/583.1, 156/583.4, 156/583.7, 156/752
• US Class Current: 156/541
• CPC Class Codes: B32B 2457/20 Displays, e.g. liquid crystal displays, plasma displays
• CPC Class Codes: B32B 37/025 Transfer laminating
• CPC Class Codes: B32B 37/06 characterised by the heating method
• CPC Class Codes: H01L 21/67144 Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
• CPC Class Codes: H01L 21/6833 Details of electrostatic chucks
• CPC Class Codes: H01L 2224/75725 in the upper part of the bonding apparatus, e.g. in the bonding head
• CPC Class Codes: H01L 2224/7598 specially adapted for batch processes
• CPC Class Codes: H01L 2224/83 using a layer connector
• CPC Class Codes: H01L 2224/83005 being a temporary or sacrificial substrate
• CPC Class Codes: H01L 2224/95136 involving guiding structures, e.g. shape matching, spacers or supporting members
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/75 Apparatus for connecting with bump connectors or layer connectors
• CPC Class Codes: H01L 24/83 using a layer connector
• CPC Class Codes: H01L 24/95 at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/10253 Silicon [Si]
• CPC Class Codes: H01L 2924/10329 Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/1421 RF devices
• CPC Class Codes: H01L 2924/1431 : Logic devices
• CPC Class Codes: H01L 2924/1434 : Memory
• CPC Class Codes: H01L 2924/1461 : MEMS
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: Y10T 156/1153 : Temperature change for delamination [e.g., heating during delaminating, etc.]
• CPC Class Codes: Y10T 156/1707 : Discrete spaced laminae on adhered carrier
• CPC Class Codes: Y10T 156/1744 : Means bringing discrete articles into assembled relationship
• CPC Class Codes: Y10T 156/1749 : All articles from single source only
• CPC Class Codes: Y10T 156/1776 : Means separating articles from bulk source

Abstract

A micro device transfer head and head array are disclosed. In an embodiment, the micro device transfer head includes a base substrate, a mesa structure with sidewalls, an electrode formed over the mesa structure, and a dielectric layer covering the electrode. A voltage can be applied to the micro device transfer head and head array to pick up a micro device from a carrier substrate and release the micro device onto a receiving substrate.

Claims

1. A micro device transfer head comprising:

a base substrate;

a mesa structure including sidewalls;

an electrode formed over the mesa structure;

a dielectric layer covering the electrode; and

a conductive ground plane formed over the dielectric layer and surrounding the mesa structure.

2. The micro device transfer head of claim 1, wherein the sidewalls are tapered and protrude away from the base substrate to a top surface of the mesa structure, and the electrode is formed on the top surface.

3. The micro device transfer head of claim 2, further comprising an electrode lead running from the electrode on the top surface of the mesa structure and along a sidewall of the mesa structure.

4. The micro device transfer head of claim 3, wherein the dielectric layer covers the electrode lead along the sidewall of the mesa structure.

5. The micro device transfer head of claim 2, further comprising a pair of electrodes formed on the top surface of the mesa structure, wherein the dielectric layer covers the pair of electrodes.

6. The micro device transfer head of claim 5, further comprising a pair of electrode leads, wherein each electrode lead runs from a corresponding electrode on the top surface of the mesa structure along a sidewall of the mesa structure.

7. The micro device transfer head of claim 6, wherein the dielectric layer covers the pair of electrode leads along the sidewall of the mesa structure.

8. The micro device transfer head of claim 5, further comprising a via through the mesa structure connecting one of the pair of electrodes to an electrode lead.

9. The micro device transfer head of claim 1, further comprising a via through the mesa structure connecting the electrode to an electrode lead.

10. The micro device transfer head of claim 1, wherein the mesa structure is integrally formed with the base substrate.

11. The micro device transfer head of claim 1, wherein the electrode comprises a material selected from the group consisting of platinum, titanium, vanadium, chromium, zirconium, niobium, molybdenum, ruthenium, rhodium, hafnium, tantalum, tungsten, rhenium, osmium, iridium and alloys thereof.

12. The micro device transfer head of claim 1, wherein the electrode comprises TiW.

13. The micro device transfer head of claim 1, wherein the dielectric layer comprises a dielectric material selected from the group consisting of Al₂O₃ and Ta₂O₅.

14. A micro device transfer head array comprising;

a base substrate;

an array of mesa structures, each mesa structure including sidewalls and an electrode formed over the mesa structure;

a dielectric layer covering the array of mesa structures and each electrode formed over each mesa structure; and

a conductive ground plane formed over the dielectric layer and surrounding each of the mesa structures.

15. The micro device transfer head array of claim 14, wherein each mesa structure is integrally formed with the base substrate.

16. The micro device transfer head array of claim 14, wherein each electrode comprises a material selected from the group consisting of platinum, titanium, vanadium, chromium, zirconium, niobium, molybdenum, ruthenium, rhodium, hafnium, tantalum, tungsten, rhenium, osmium, iridium and alloys thereof.

17. The micro device transfer head of claim 14, wherein each electrode comprises TiW.

18. The micro device transfer head of claim 14, wherein the dielectric layer comprises a dielectric material selected from the group consisting of Al₂O₃ and Ta₂O₅.

19. An electrostatic micro device transfer head comprising:

a base substrate;

a mesa structure including sidewalls protruding away from the base substrate to provide a localized contact point for the electrostatic transfer head;

a dielectric layer covering the mesa structure; and

a conductive ground plane formed over the base substrate and surrounding the mesa structure.

20. The electrostatic micro device transfer head of claim 19, wherein the mesa structure is integrally formed with the base substrate.

21. The electrostatic micro device transfer head of claim 19, wherein the dielectric layer comprises a dielectric material selected from the group consisting of Al₂O₃ and Ta₂O₅.

22. The electrostatic micro device transfer head of claim 19, wherein the base substrate and the mesa structure each comprise silicon.

23. An electrostatic micro device transfer head array comprising;

a base substrate;

an array of mesa structures, each mesa structure including sidewalls protruding away from the base substrate to provide a localized contact point for each electrostatic transfer head;

a dielectric layer covering the array of mesa structures; and

a conductive ground plane formed over the base substrate and surrounding each of the mesa structures.

24. The electrostatic micro device transfer head array of claim 23, wherein each mesa structure is integrally formed with the base substrate.

25. The electrostatic micro device transfer head of claim 23, wherein the dielectric layer comprises a dielectric material selected from the group consisting of Al₂O₃ and Ta₂O₅.

26. The electrostatic micro device transfer head of claim 23, wherein the base substrate and the array of mesa structures each comprise silicon.