Delay restricted channel estimation for multi-carrier systems
First Claim
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1. A method comprising:
- suppressing, at a device some but not all elements of a first matrix representing an estimate of a channel to obtain a suppressed estimate of the channel, wherein the first matrix is obtained from an operation on a second matrix and wherein the second matrix is a transform matrix to transform a set of symbols from a first domain representation to a second domain representation;
multiplying, at the device, the suppressed estimate of the channel by a third matrix to obtain a delay restricted estimate of the channel; and
demodulating a signal received via the channel based at least in part on the delay restricted estimate of the channel.
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Abstract
A method includes multiplying, at a device, a suppressed estimate of a channel by a first matrix to obtain a delay restricted estimate of the channel. The method also includes demodulating a signal received via the channel based at least in part on the delay restricted estimate of the channel.
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16 Claims
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1. A method comprising:
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suppressing, at a device some but not all elements of a first matrix representing an estimate of a channel to obtain a suppressed estimate of the channel, wherein the first matrix is obtained from an operation on a second matrix and wherein the second matrix is a transform matrix to transform a set of symbols from a first domain representation to a second domain representation; multiplying, at the device, the suppressed estimate of the channel by a third matrix to obtain a delay restricted estimate of the channel; and demodulating a signal received via the channel based at least in part on the delay restricted estimate of the channel. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. An apparatus, comprising:
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a suppressor configured to suppress some but not all elements of a first matrix representing a channel estimate to obtain a suppressed channel estimate of the channel, wherein a particular element of the first matrix is suppressed by setting the particular element to zero; a multiplier configured to multiply the suppressed channel estimate by a second matrix to obtain a delay restricted estimate of the channel, wherein the second matrix is unitary and is obtained from a singular value decomposition of a Fourier transform matrix; and a demodulator configured to demodulate a signal received via the channel based at least in part on the delay restricted estimate of the channel. - View Dependent Claims (13, 14)
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15. A computer-readable device, comprising instructions that, when executed by a processor, cause the processor to perform operations including:
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suppressing some but not all elements of a first matrix representing an estimate of a channel to obtain a suppressed estimate of the channel, wherein suppression of an element of the first matrix comprises setting the element to zero; multiplying the suppressed estimate of the channel by a second matrix to obtain a delay restricted estimate of the channel, wherein the second matrix is a unitary matrix obtained from a singular value decomposition of a Fourier transform matrix; and demodulating a signal received via the channel based at least in part on the delay restricted estimate of the channel. - View Dependent Claims (16)
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Specification