Integrated RF front end with stacked transistor switch
First Claim
1. An integrated RF Power Amplifier (PA) circuit, comprising:
- a) an input node to accept an input signal with respect to a reference voltage Vref, coupled to a gate G1 of a first insulated-gate FET M1;
b) a plurality of additional insulated-gate FETs M2 to Mn having a same polarity as M1 and coupled in series with M1 to form a control circuit configured to control conduction between the reference voltage and an output drive node, wherein FETs M2 to Mn are each enslaved to M1;
c) an output coupling capacitor coupling the output drive node to an output load node; and
d) an output power control input node coupled to a power controlling insulated-gate FET that is coupled in series connection with M1.
2 Assignments
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Accused Products
Abstract
A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.
542 Citations
9 Claims
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1. An integrated RF Power Amplifier (PA) circuit, comprising:
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a) an input node to accept an input signal with respect to a reference voltage Vref, coupled to a gate G1 of a first insulated-gate FET M1; b) a plurality of additional insulated-gate FETs M2 to Mn having a same polarity as M1 and coupled in series with M1 to form a control circuit configured to control conduction between the reference voltage and an output drive node, wherein FETs M2 to Mn are each enslaved to M1; c) an output coupling capacitor coupling the output drive node to an output load node; and d) an output power control input node coupled to a power controlling insulated-gate FET that is coupled in series connection with M1. - View Dependent Claims (2, 3, 4)
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5. An integrated RF Power Amplifier (PA) circuit, comprising:
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a) an input node to accept an input signal with respect to a reference voltage Vref, coupled to a gate G1 of a first insulated-gate FET M1; b) a plurality of additional insulated-gate FETs M2 to Mn having corresponding gates G2 to Gn and a same polarity as M1 and coupled in series with M1 to form a control circuit configured to control conduction between the reference voltage and an output drive node, wherein FETs M2 to Mn are each enslaved to M1; c) an output coupling capacitor coupling the output drive node to an output load node; and d) a corresponding predominantly capacitive element connected directly between each gate, G2 to Gn, and Vref. - View Dependent Claims (6, 7, 8, 9)
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Specification