Integrated circuit module and manufacturing methods and application thereof

• US 8,650,520 B2
• Filed: 07/01/2011
• Issued: 02/11/2014
• Est. Priority Date: 07/01/2011
• Status: Active Grant

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Hsu, Chen-Hsien, Yang, Shu-Yi, Wang, Jinn-Shyan
• Primary Examiner(s): Parihar, Suchin
• Application Number:
  US13/174,832
• Publication Number:
  US 20130007678A1
• Time in Patent Office: 956 Days
• Field of Search: 716/100, 716/110
• US Class Current: 716/110
• CPC Class Codes: H01L 21/823807 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 21/82385 gate conductors with different shapes, lengths or dimensions

Abstract

An exemplary integrated circuit module includes a first transistor and a second transistor. The first transistor has a first channel length and a first threshold voltage. The second transistor is electrically coupled to the first transistor and has a second channel length and a second threshold voltage. The second channel length is greater than the first channel length, the absolute value of the second threshold voltage is smaller than the absolute value of the first threshold voltage, and the first transistor and the second transistor have a same threshold voltage implant concentration. Moreover, a manufacturing method of such integrated circuit module, and an application of such integrated circuit module to computer aided design of logic circuit also are provided.

Claims

1. An integrated circuit module comprising:

a first transistor, having a first channel length and a first threshold voltage; and

a second transistor, electrically coupled to the first transistor, having a second channel length and a second threshold voltage,

wherein the second channel length is twice of the first channel length, the absolute value of the second threshold voltage is smaller than the absolute value of the first threshold voltage, and the first transistor and the second transistor have a same threshold voltage implant concentration.

2. The integrated circuit module as claimed in claim 1, wherein a source of the second transistor is grounded.

3. The integrated circuit module as claimed in claim 1, wherein the integrated circuit module is operated in sub-threshold region.

4. The integrated circuit module as claimed in claim 3, wherein the integrated circuit module has an operation voltage of no more than about 0.5V.

5. The integrated circuit module as claimed in claim 1, wherein the integrated circuit module has an operation voltage higher than, lower than or fall in the range of 0.9 V˜

1.2V.

6. The integrated circuit module as claimed in claim 1, further comprising:

a third transistor, electrically coupled to the first and second transistors and having the same threshold voltage implant concentration as the second transistor, wherein the third transistor has a third channel length and a third threshold voltage, the third channel length is smaller than the second channel length, and the absolute value of the third threshold voltage is greater than the absolute value of the second threshold voltage.

7. The integrated circuit module as claimed in claim 1, wherein each of the first transistors and each of the second transistors has a halo implant structure.

8. A method for manufacturing an integrated circuit module, comprising:

providing a substrate;

sequentially forming a gate dielectric layer and a gate material layer on the substrate in that order;

performing a threshold voltage implant process on the gate material layer to define a threshold voltage implant region in the substrate; and

forming a first transistor and a second transistor electrically coupled with each other on the substrate and thereby respectively defining a first channel and a second channel in the threshold voltage implant region, wherein a length of the second channel is twice of a first channel length of the first channel, the absolute value of the second threshold voltage is smaller than the absolute value of the first threshold voltage, and the first transistor and the second transistor have an identical threshold voltage implant concentration.

9. The method as claimed in claim 8, wherein the formation of the first and second transistors comprises:

patterning the gate dielectric layer and the gate material layer to form a first gate and a second gate; and

performing at least an ion implant process to define a first source and drain region and a second source and drain region in the substrate respectively neighboring with the first gate and the second gate.

10. The method as claimed in claim 9, further comprising:

performing a halo implant process to form a first halo implant region and a second halo implant region respectively underlying the first channel and the second channel and respectively neighboring with the first source and drain region and the second source and drain region.

11. The method as claimed in claim 9, further comprising:

forming a grounding path to ground the source of the second transistor.

12. The method as claimed in claim 8, further comprising:

forming a third transistor simultaneously with the formation of the first and second transistors, wherein the third transistor is electrically coupled with the first and second transistors, and a length of a third channel of the third transistor is smaller than the length of the second channel.

13. A computer aided design method for creating a logic circuit, comprising:

simulating a design of the logic circuit by a computer aided simulation tool, wherein the logic circuit is comprised of a plurality of standard integrated circuit modules;

analyzing the logic circuit to determine a critical path in the logic circuit; and

providing an integrated circuit module with reverse short channel effect to replace at least one of the standard integrated circuit modules in the critical path, wherein the integrated circuit module with revere short channel effect comprises;

a first transistor, having a first channel length and a first threshold voltage; and

a second transistor, electrically coupled to the first transistor, having a second channel length and a second threshold voltage, wherein the second channel length is twice of the first channel length, the absolute value of the second threshold voltage is smaller than the absolute value of the first threshold voltage, and the first transistor and the second transistor have a same threshold voltage implant concentration.

14. The computer aided design method as claimed in claim 13, wherein a source of the second transistor is grounded.

15. The computer aided design method as claimed in claim 13, wherein the integrated circuit module with reverse short channel effect is operated in sub-threshold region and has an operation voltage of no more than about 0.5V.

16. The computer aided design method as claimed in claim 13, wherein the integrated circuit module with reverse short channel effect has an operation voltage higher than, lower than or fall in the range of about 0.9V˜

1.2V.

17. The computer aided design method as claimed in claim 13, wherein each of the first and second transistors has a halo implant structure.

18. The computer aided design method as claimed in claim 13, wherein the integrated circuit module with reverse short channel effect further comprises a third transistor electrically coupled to the first and second transistors and having the same threshold voltage implant concentration as the second transistor, the third transistor has a third channel length and a third threshold voltage, the third channel length is smaller than the second channel length, and the absolute value of the third threshold voltage is greater than the absolute value of the second threshold voltage.