Semiconductor device and electric power conversion system using the same

• US 8,653,588 B2
• Filed: 07/19/2012
• Issued: 02/18/2014
• Est. Priority Date: 07/20/2011
• Status: Expired due to Fees

• Current Assignee: Hitachi Power Semiconductor Device, Ltd. (Minebea Mitsumi, Inc.)
• Original Assignee: Hitachi, Ltd.
• Inventors: Watanabe, So, Shiraishi, Masaki, Suzuki, Hiroshi, Mori, Mutsuhiro
• Primary Examiner(s): YUSHIN, NIKOLAY K
• Application Number:
  US13/553,431
• Publication Number:
  US 20130020634A1
• Time in Patent Office: 579 Days
• Field of Search: 257/328, 257/330, 257/E29.262
• US Class Current: 257/330
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT

Abstract

A semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type on the first semiconductor layer; trenches in the first semiconductor layer; a semiconductor protruding part on the first semiconductor layer; a third semiconductor layer on the semiconductor protruding part; a fourth semiconductor layer on the third semiconductor layer; a gate insulating layer disposed along the trench; a first interlayer insulating layer disposed along the trench; a first conductive layer facing to the fourth semiconductor layer; a second conductive layer on the first interlayer insulating layer; a second interlayer insulating layer covering the second conductive layer; a third conductive layer on the third semiconductor layer and fourth semiconductor layer; a contacting part connecting the third conductive layer and third semiconductor layer; and a fourth conductive layer formed on the second semiconductor layer.

Claims

1. A semiconductor device comprising:

a first semiconductor layer of a first conductivity type;

a second semiconductor layer of a second conductivity type formed on one of surfaces of the first semiconductor layer;

trenches formed on the other surface of the first semiconductor layer opposite to the second semiconductor layer;

a semiconductor protruding part whose side surfaces are sandwiched between the trenches and formed on a rest of the surface of the first semiconductor layer other than the surface on which the trenches are formed;

a third semiconductor layer of the second conductivity type formed on a surface of the semiconductor protruding part at a predetermined location;

a fourth semiconductor layer of the first conductivity type partially formed on a surface of the third semiconductor layer and having a higher impurity concentration than the first semiconductor layer;

a gate insulating layer disposed on a part of an inner wall of the trenches;

a first interlayer insulating layer disposed on a rest of the inner wall of the trenches other than the inner wall on which the gate insulating layer is disposed;

a first conductive layer, at least a part thereof facing the fourth semiconductor layer via the gate insulating layer;

a second conductive layer formed on a surface of the first interlayer insulating layer;

a second interlayer insulating layer, at least a part thereof covering at least a part of a surface of the second conductive layer;

a third conductive layer, at least a part thereof being formed on surfaces of the third semiconductor layer and the fourth semiconductor layer and electrically connected to the fourth semiconductor layer;

a contacting part electrically connecting the third conductive layer and the third semiconductor layer;

a fourth conductive layer formed on a surface of the second semiconductor layer,

wherein a part of the surface of the semiconductor protruding part includes a part of the first semiconductor layer; and

wherein the third semiconductor layer covers a circumference of side-wall of the first conductive layer.

2. The semiconductor device according to claim 1,

wherein the contacting part covers a side-wall of the first conductive layer.

3. A semiconductor device comprising:

a first semiconductor layer of a first conductivity type;

a second semiconductor layer of a second conductivity type formed on one of surfaces of the first semiconductor layer;

trenches formed on the other surface of the first semiconductor layer opposite to the second semiconductor layer;

a semiconductor protruding part whose side surfaces are sandwiched between the trenches and formed on a rest of the surface of the first semiconductor layer other than the surface on which the trenches are formed;

a third semiconductor layer of the second conductivity type selectively formed on a surface of the semiconductor protruding part at a predetermined location;

a fourth semiconductor layer of the first conductivity type partially formed on a surface of the third semiconductor layer and having a higher impurity concentration than the first semiconductor layer;

a gate insulating layer disposed along a part of an inner wall of the trenches;

a first interlayer insulating layer disposed along a rest of the inner wall of the trenches other than the inner wall on which the gate insulating layer is disposed;

a first conductive layer at least a part thereof facing to the fourth semiconductor layer via the gate insulating layer;

a second conductive layer formed on a surface of the first interlayer insulating layer;

a second interlayer insulating layer at least a part thereof covering at least a part of a surface of the second conductive layer;

a third interlayer insulating layer at least a part thereof covering at least a part of the surface of the first conductive layer;

a third conductive layer at least a part thereof formed on surfaces of the third semiconductor layer and the fourth semiconductor layer;

a contacting part electrically connecting the third conductive layer and the third semiconductor layer;

a fourth conductive layer formed on a surface of the second semiconductor layer,

wherein at least a part of the first conductive layer covers at least a part of the second interlayer insulating layer,

at least a part of the third conductive layer covers at least a part of the third interlayer insulating layer,

a part of the surface of the semiconductor protruding part includes a part of the first semiconductor layer; and

wherein the third semiconductor layer covers a circumference of side-wall of the first conductive layer.

4. The semiconductor device according to claim 3,

wherein the contacting part covers a side-wall of the first conductive layer.

5. A semiconductor device comprising:

a first semiconductor layer of a first conductivity type;

a second semiconductor layer of a second conductivity type formed on one of surfaces of the first semiconductor layer;

trenches formed on the other surface of the first semiconductor layer opposite to the second semiconductor layer;

a semiconductor protruding part whose side surfaces sandwiched between the trenches and formed on a rest of the surface of the first semiconductor layer other than the surface on which the trenches are formed;

a third semiconductor layer of the second conductivity type formed on a surface of the semiconductor protruding part at a predetermined location;

a fourth semiconductor layer of the first conductivity type partially formed on a surface of the third semiconductor layer and having a higher impurity concentration than the first semiconductor layer;

a gate insulating layer disposed on a part of an inner wall of the trenches;

a first interlayer insulating layer disposed on a rest of the inner wall of the trenches other than the inner wall on which the gate insulating layer is disposed;

a first conductive layer, at least a part thereof facing the fourth semiconductor layer via the gate insulating layer;

a second conductive layer formed on a surface of the first interlayer insulating layer;

a second interlayer insulating layer, at least a part thereof covering at least a part of a surface of the second conductive layer;

a third conductive layer, at least a part thereof being formed on surfaces of the third semiconductor layer and the fourth semiconductor layer and electrically connected to the fourth semiconductor layer;

a contacting part electrically connecting the third conductive layer and the third semiconductor layer;

a fourth conductive layer formed on a surface of the second semiconductor layer,

wherein a part of the surface of the semiconductor protruding part includes a part of the first semiconductor layer; and

wherein the adjacent trenches are connected together to communicate each other to have a loop trench shape in a horizontal planar view.

6. The semiconductor device according to claim 5,

wherein the adjacent trenches having the loop trench shape are connected in a ladder shape in a horizontal planar view.

7. A semiconductor device comprising:

a first semiconductor layer of a first conductivity type;

a second semiconductor layer of a second conductivity type formed on one of surfaces of the first semiconductor layer;

trenches formed on the other surface of the first semiconductor layer opposite to the second semiconductor layer;

a semiconductor protruding part whose side surfaces sandwiched between the trenches and formed on a rest of the surface of the first semiconductor layer other than the surface on which the trenches are formed;

a third semiconductor layer of the second conductivity type selectively formed on a surface of the semiconductor protruding part at a predetermined location;

a fourth semiconductor layer of the first conductivity type partially formed on a surface of the third semiconductor layer and having a higher impurity concentration than the first semiconductor layer;

a gate insulating layer disposed along a part of an inner wall of the trenches;

a first interlayer insulating layer disposed along a rest of the inner wall of the trenches other than the inner wall on which the gate insulating layer is disposed;

a first conductive layer at least a part thereof facing to the fourth semiconductor layer via the gate insulating layer;

a second conductive layer formed on a surface of the first interlayer insulating layer;

a second interlayer insulating layer at least a part thereof covering at least a part of a surface of the second conductive layer;

a third interlayer insulating layer at least a part thereof covering at least a part of the surface of the first conductive layer;

a third conductive layer at least a part thereof formed on surfaces of the third semiconductor layer and the fourth semiconductor layer;

a contacting part electrically connecting the third conductive layer and the third semiconductor layer;

a fourth conductive layer formed on a surface of the second semiconductor layer,

wherein at least a part of the first conductive layer covers at least a part of the second interlayer insulating layer,

at least a part of the third conductive layer covers at least a part of the third interlayer insulating layer,

a part of the surface of the semiconductor protruding part includes a part of the first semiconductor layer; and

wherein the adjacent trenches are connected together to communicate each other to have a loop trench shape in a horizontal planar view.

8. The semiconductor device according to claim 7,

wherein the adjacent trenches having the loop trench shape are connected in a ladder shape in a horizontal planar view.

9. A semiconductor device comprising:

a first semiconductor layer of a first conductivity type;

a second semiconductor layer of a second conductivity type formed on one of surfaces of the first semiconductor layer;

trenches formed on the other surface of the first semiconductor layer opposite to the second semiconductor layer;

a semiconductor protruding part whose side surfaces sandwiched between the trenches and formed on a rest of the surface of the first semiconductor layer other than the surface on which the trenches are formed;

a third semiconductor layer of the second conductivity type formed on a surface of the semiconductor protruding part at a predetermined location;

a fourth semiconductor layer of the first conductivity type partially formed on a surface of the third semiconductor layer and having a higher impurity concentration than the first semiconductor layer;

a gate insulating layer disposed on a part of an inner wall of the trenches;

a first interlayer insulating layer disposed on a rest of the inner wall of the trenches other than the inner wall on which the gate insulating layer is disposed;

a first conductive layer, at least a part thereof facing the fourth semiconductor layer via the gate insulating layer;

a second conductive layer formed on a surface of the first interlayer insulating layer;

a second interlayer insulating layer, at least a part thereof covering at least a part of a surface of the second conductive layer;

a third conductive layer, at least a part thereof being formed on surfaces of the third semiconductor layer and the fourth semiconductor layer and electrically connected to the fourth semiconductor layer;

a contacting part electrically connecting the third conductive layer and the third semiconductor layer;

a fourth conductive layer formed on a surface of the second semiconductor layer,

wherein a part of the surface of the semiconductor protruding part includes a part of the first semiconductor layer; and

wherein the adjacent trenches having the loop trench shape are connected to have a zigzag trench in the horizontal planar view.

10. A semiconductor device comprising:

a first semiconductor layer of a first conductivity type;

a second semiconductor layer of a second conductivity type formed on one of surfaces of the first semiconductor layer;

trenches formed on the other surface of the first semiconductor layer opposite to the second semiconductor layer;

a semiconductor protruding part whose side surfaces sandwiched between the trenches and formed on a rest of the surface of the first semiconductor layer other than the surface on which the trenches are formed;

a third semiconductor layer of the second conductivity type selectively formed on a surface of the semiconductor protruding part at a predetermined location;

a fourth semiconductor layer of the first conductivity type partially formed on a surface of the third semiconductor layer and having a higher impurity concentration than the first semiconductor layer;

a gate insulating layer disposed along a part of an inner wall of the trenches;

a first interlayer insulating layer disposed along a rest of the inner wall of the trenches other than the inner wall on which the gate insulating layer is disposed;

a first conductive layer at least a part thereof facing to the fourth semiconductor layer via the gate insulating layer;

a second conductive layer formed on a surface of the first interlayer insulating layer;

a second interlayer insulating layer at least a part thereof covering at least a part of a surface of the second conductive layer;

a third interlayer insulating layer at least a part thereof covering at least a part of the surface of the first conductive layer;

a third conductive layer at least a part thereof formed on surfaces of the third semiconductor layer and the fourth semiconductor layer;

a contacting part electrically connecting the third conductive layer and the third semiconductor layer;

a fourth conductive layer formed on a surface of the second semiconductor layer,

wherein at least a part of the first conductive layer covers at least a part of the second interlayer insulating layer,

at least a part of the third conductive layer covers at least a part of the third interlayer insulating layer,

a part of the surface of the semiconductor protruding part includes a part of the first semiconductor layer; and

wherein the adjacent trenches having the loop trench shape are connected to have a zigzag trench in the horizontal planar view.