Electronic device and method for buffering
First Claim
1. An electronic device comprisinga buffer, the buffer having a first switch and a second switch coupled in series at a first output node,a third switch and a fourth switch coupled in series at a second output node,a first current source and a second current source, whereinthe first current source is coupled with one side to the first switch and the third switch and with another side to a first supply voltage,the second current source is coupled with one side to the second switch and the fourth switch and with a second side to a second supply voltage, andthe first current source is configured to adjust an output swing in a first operation mode and in a second operation mode, andthe second current source is configured to adjust a common mode voltage level of the output signal in the first operation mode and to provide maximum series resistance in the second operation mode,wherein the first current source and the second current source are configured to provide controlled series resistance in a third operation mode, andwherein the first current source and the second current source are transistors, the control gates of which are coupled to receive variable voltage levels in order to control the series resistance of the transistors in the third operation mode so as to adjust the rise and/or fall time of the signals at the first and second output node.
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Accused Products
Abstract
A buffer is provided. The buffer includes a first switch and a second switch coupled in series at a first output node, a third switch and a fourth switch coupled in series at a second output node, a first current source and a second current source. The first current source is coupled with one side to the first switch and the third switch and with another side to a first supply voltage, the second current source is coupled with one side to the second switch and the fourth switch and with a second side to a second supply voltage. The first current source is configured to adjust an output swing in a first operation mode and in a second operation. The second current source is configured to adjust a common mode voltage level of the output signal in the first operation mode and to provide maximum series resistance in the second operation mode.
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Citations
16 Claims
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1. An electronic device comprising
a buffer, the buffer having a first switch and a second switch coupled in series at a first output node, a third switch and a fourth switch coupled in series at a second output node, a first current source and a second current source, wherein the first current source is coupled with one side to the first switch and the third switch and with another side to a first supply voltage, the second current source is coupled with one side to the second switch and the fourth switch and with a second side to a second supply voltage, and the first current source is configured to adjust an output swing in a first operation mode and in a second operation mode, and the second current source is configured to adjust a common mode voltage level of the output signal in the first operation mode and to provide maximum series resistance in the second operation mode, wherein the first current source and the second current source are configured to provide controlled series resistance in a third operation mode, and wherein the first current source and the second current source are transistors, the control gates of which are coupled to receive variable voltage levels in order to control the series resistance of the transistors in the third operation mode so as to adjust the rise and/or fall time of the signals at the first and second output node.
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11. An apparatus comprising:
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a buffer; a first control circuit that is coupled to the buffer so as to set a tail current for the buffer; and a second control circuit that is coupled to the buffer so as to set a common mode current for the buffer, wherein the first and second control circuits have a first mode, a second mode, a third mode, and a fourth mode, and wherein the tail and common mode currents correspond to the first, second, third, and fourth modes, and wherein, in the first, second, and third modes, the buffer is configured to provide a differential output signal, and wherein, in the fourth mode, the buffer is configured to provide a single-ended output, wherein the apparatus further comprises first and second supply rails, and wherein the buffer further comprises; a first transistor that is coupled to the first supply rail and that is coupled to the first control circuit at its control electrode; a first branch that receives a first input signal and that is coupled to the first transistor; a second branch that receives a second input signal and that is coupled to the first transistor; a measurement circuit that is coupled between the first and second branches so as to measure a common mode voltage; and a second transistor that is coupled to the first and second branches and the second supply rail and that is coupled to the second control circuit at its control electrode. - View Dependent Claims (12, 13, 14, 15, 16)
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Specification