Static random-access cell, active matrix device and array element circuit

• US 8,654,571 B2
• Filed: 01/11/2012
• Issued: 02/18/2014
• Est. Priority Date: 07/06/2010
• Status: Active Grant

• Current Assignee: Sharp Life Science (EU) Limited
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: John, Gareth, Zebedee, Patrick
• Primary Examiner(s): Koval, Melissa
• Assistant Examiner(s): Armstrong, Stephen G
• Application Number:
  US13/347,856
• Publication Number:
  US 20120106238A1
• Time in Patent Office: 769 Days
• Field of Search: None
• US Class Current: 365/154
• CPC Class Codes: B01L 2200/061 Counting droplets
• CPC Class Codes: B01L 2200/0673 Handling of plugs of fluid surrounded by immiscible fluid
• CPC Class Codes: B01L 2200/143 Quality control, feedback systems
• CPC Class Codes: B01L 2300/0645 Electrodes
• CPC Class Codes: B01L 2300/161 Control and use of surface tension forces, e.g. hydrophobic, hydrophilic
• CPC Class Codes: B01L 2400/0427 Electrowetting
• CPC Class Codes: B01L 3/50273 characterised by the means or forces applied to move the fluids micropumps F04B19/006, of the membrane type F04B43/043
• CPC Class Codes: G09G 2300/0852 being a dynamic memory with more than one capacitor
• CPC Class Codes: G09G 2356/00 Detection of the display position w.r.t. other display screens
• CPC Class Codes: G09G 3/348 based on the deformation of a fluid drop, e.g. electrowetting

Abstract

A static random-access memory (SRAM) cell which includes: a sampling switch and a feedback switch; and a first inverter and a second inverter connected in series whereby an output of the first inverter is connected to an input of the second inverter. An input of the first inverter is connected to a data input of the SRAM cell via the sampling switch, and to a data output of the SRAM cell independent of the feedback switch, an output of the second inverter is connected to the input of the first inverter via the feedback switch, and first and second clock inputs of the SRAM cell are configured to control the sampling switch and the feedback switch, respectively.

Claims

1. A static random-access memory (SRAM) cell comprising:

a sampling switch and a feedback switch; and

a first inverter and a second inverter connected in series whereby an output of the first inverter is connected to an input of the second inverter,

wherein an input of the first inverter is connected to a data input of the SRAM cell via the sampling switch, and to a data output of the SRAM cell independent of the feedback switch,

an output of the second inverter is connected to the input of the first inverter via the feedback switch, and

first and second clock inputs of the SRAM cell are configured to control the sampling switch and the feedback switch, respectively.

2. The SRAM cell according to claim 1, further comprising timing circuitry configured to switch the sampling switch and feedback switch at different times with respect to each other during a predefined operation.

3. An active-matrix device, comprising:

a plurality of array element circuits arranged in rows and columns;

a plurality of source addressing lines each shared between the array element circuits in corresponding same columns;

a plurality of gate addressing lines each shared between the array element circuits in corresponding same rows; and

a plurality of sensor row select lines each shared between the array element circuits in corresponding same rows,

wherein each of the plurality of array element circuits comprises;

an array element which is controlled by application of a drive voltage by a drive element;

writing circuitry for writing the drive voltage to the drive element, the writing circuitry being coupled to a corresponding source addressing line and gate addressing line among the plurality of source addressing lines and gate addressing lines, and including a static random-access memory (SRAM) cell for storing the drive voltage which is written to the drive element; and

sense circuitry for sensing an impedance presented at the drive element, the sense circuitry being coupled to a corresponding sensor row select line;

wherein the SRAM cell comprises;

a sampling switch and a feedback switch; and

a first inverter and a second inverter connected in series whereby an output of the first inverter is connected to an input of the second inverter,

wherein an input of the first inverter is connected to a data input of the SRAM cell via the sampling switch, and to a data output of the SRAM cell independent of the feedback switch,

an output of the second inverter is connected to the input of the first inverter via the feedback switch, and

first and second clock inputs of the SRAM cell are configured to control the sampling switch and the feedback switch, respectively.

4. The active-matrix device according to claim 3, wherein the data input of the SRAM cell is connected to the corresponding source addressing line and the data output of the SRAM cell is connected to the corresponding drive element.

5. The active-matrix device according to claim 4, comprising timing circuitry configured to switch the sampling switch and feedback switch within a given one of the SRAM cells at different times with respect to each other during a predefined operation.

6. The active-matrix device according to claim 5, wherein as part of a write operation in order to write the drive voltage to a drive element via the corresponding SRAM cell, the timing circuitry is configured to effect:

(a) turning on the sampling switch to connect the data at the data input to the drive element;

(b) turning on the feedback switch to effect a closed loop which holds the data at the drive element; and

(c) subsequent to (a) and (b), turning off the sampling switch to disconnect the input of the first inverter from the data input.

7. The active-matrix device according to claim 6, wherein the predefined operation is a sensor operation following the write operation, and as part of the sensor operation the timing circuitry is configured to:

(d) while the sampling switch remains off following (c), turn off the feedback switch to effect an open loop whereafter the sense circuitry senses the impedance presented at the drive element.

8. The active-matrix device according to claim 7, wherein as part of the sensor operation the timing circuitry is configured to:

(e) subsequent to (d) and while the sampling switch remains off following (c), turn on the feedback switch to effect the closed loop which holds the data at the drive element.

9. The active-matrix device according to claim 3, wherein the sampling switches of the respective SRAM cells are controlled by a clock signal on the corresponding gate addressing line.

10. The active-matrix device according to claim 3, wherein the feedback switches of the respective SRAM cells are controlled by a clock signal on a corresponding sensor enable line.

11. The active-matrix device according to claim 10, wherein the corresponding sensor enable line is shared between all of the array element circuits in corresponding same rows.

12. The active-matrix device according to claim 10, wherein the corresponding enable line is shared among all the plurality of array element circuits.

13. The active-matrix device according to claim 3, wherein the SRAM cells each include only the sampling switch and the feedback switch insofar as switches, and clock signals provided to the sampling switch and the feedback switch are not complementary.

14. The active-matrix device according to claim 3, wherein the array elements are hydrophobic cells having a surface of which the hydrophobicity is controlled by the application of the drive voltage by the corresponding drive element, and the corresponding sense circuitry senses the impedance presented at the drive element by the hydrophobic cell.

15. The active-matrix device according to claim 3, wherein with respect to each of the plurality of array element circuits:

the writing circuitry is configured to perturb the drive voltage written to the drive element;

the sense circuitry is configured sense a result of the perturbation of the drive voltage written to the drive element, the result of the perturbation being dependent upon the impedance presented at the drive element; and

the sense circuitry includes an output for producing an output signal a value of which represents the impedance presented at the drive element.

16. The active-matrix device according to claim 3, wherein:

the active-matrix device includes a plurality of sensor output lines each shared between the array element circuits in corresponding same columns, and the outputs of the plurality of array element circuits are coupled to a corresponding sensor output line.

17. A device having an array element circuit with an integrated impedance sensor, comprising:

an array element which is controlled by application of a drive voltage by a drive element;

writing circuitry for writing the drive voltage to the drive element, the writing circuitry comprising a static random-access memory (SRAM) cell; and

sense circuitry for sensing an impedance presented at the drive element;

wherein the SRAM cell comprises;

a sampling switch and a feedback switch; and

a first inverter and a second inverter connected in series whereby an output of the first inverter is connected to an input of the second inverter,

wherein an input of the first inverter is connected to a data input of the SRAM cell via the sampling switch, and to a data output of the SRAM cell independent of the feedback switch,

an output of the second inverter is connected to the input of the first inverter via the feedback switch, and

first and second clock inputs of the SRAM cell are configured to control the sampling switch and the feedback switch, respectively.

18. The device according to claim 17, wherein the data input of the SRAM cell is connected to the corresponding source addressing line and the data output of the SRAM cell is connected to the corresponding drive element.

19. The device according to claim 17, wherein the array element is a hydrophobic cell having a surface of which the hydrophobicity is controlled by the application of the drive voltage by the drive element, and the sense circuitry senses the impedance presented at the drive element by the hydrophobic cell.

20. The device according to claim 17, wherein:

the writing circuitry is configured to perturb the drive voltage written to the drive element;

the sense circuitry is configured to sense a result of the perturbation of the drive voltage written to the drive element, the result of the perturbation being dependent upon the impedance presented at the drive element; and

the sense circuitry includes an output for producing an output signal a value of which represents the impedance presented at the drive element.