Combining signals with a shuffled-hadamard function

• US 8,654,817 B2
• Filed: 01/17/2013
• Issued: 02/18/2014
• Est. Priority Date: 12/05/2000
• Status: Active Grant

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: Google Inc. (Alphabet Inc.)
• Inventors: Gunter, Michial Allen
• Primary Examiner(s): FILE, ERIN M
• Application Number:
  US13/743,633
• Publication Number:
  US 20130148695A1
• Time in Patent Office: 397 Days
• Field of Search: 375/145
• US Class Current: 375/145
• CPC Class Codes: H04B 1/707 using direct sequence modulation
• CPC Class Codes: H04J 13/00 Code division multiplex systems for frequency hopping H04B1/713
• CPC Class Codes: H04J 13/10 Code generation
• CPC Class Codes: H04L 5/22 using time-division multiplexing

Abstract

A method can include receiving, at a transmitter, during a symbol time that comprises a plurality of chip times, a data value for each of a plurality of distinct data channel inputs. During each chip time, the method can include (a) indexing a different row of a matrix of data bits; (b) decoding one channel input using a first subset of one or more columns of the indexed row; (c) determining a code value for the decoded one channel from a second subset of one or more columns of the indexed row; and (d) providing the coded data value to a transmission circuit for transmission to a receiver. Actions (a) to (d) can be performed for each of the plurality of chip times in the symbol time. In some implementations, the matrix of data bits is a Hadamard matrix with randomly shuffled rows.

Claims

1. A computer-implemented method, comprising:

receiving, at a transmitter, for a symbol time that comprises a plurality of chip times, a data value for each of a plurality of distinct data channel inputs; and

for each of the plurality of the chip times in the symbol time;

(a) indexing a different row of a matrix of data bits, the matrix of data bits having a plurality of rows and a plurality of columns;

(b) selecting one channel from the plurality of distinct data channel inputs using a first subset of one or more columns of the indexed row;

(c) determining a code value for the data value for the selected one channel from a plurality of possible code values that are derived from a second subset comprising of one or more columns of the indexed row, the second subset being different from the first subset; and

(d) providing the determined code value to a transmission circuit for transmission to a receiver.

2. The method of claim 1, wherein the matrix of data bits comprises a first matrix that corresponds to a matrix having randomly or pseudo-randomly shuffled rows.

3. The method of claim 1, wherein the matrix of data bits comprises a first matrix that corresponds to a Hadamard matrix whose rows have been shuffled.

4. The method of claim 1, wherein data values received from the plurality of distinct data channel inputs and bits in the matrix of bits have binary values.

5. The method of claim 4, wherein the first subset comprises a number of columns corresponding to a base-2 logarithm of a number of data channel inputs in the plurality of distinct data channel inputs.

6. The method of claim 1, wherein (c) determining the code value comprises determining the code value based on the data value.

7. A method comprising:

for each chip time in a symbol time that comprises a plurality of chip times;

(a) receiving, at a receiver, a bit from a medium that couples the receiver to a transmitter;

(b) indexing a different row of a matrix of data bits;

(c) selecting one channel from a plurality of distinct data channel outputs, which correspond to a plurality of distinct channel inputs at the transmitter, using a first subset of one or more columns of the indexed row; and

(d) comparing the received bit with each of multiple code values that are derived from a second subset of one or more columns of the indexed row, the second subset being different from the first subset; and

outputting, at the receiver, a data value for each of the distinct data channel outputs, wherein the data values are based on the comparisons of the received bits and the derived code values.

8. The method of claim 7, further comprising synchronizing indexing in the receiver with indexing in the transmitter.

9. The method of claim 7, wherein the matrix of data bits comprises a first matrix that corresponds to a matrix having randomly or pseudo-randomly shuffled rows.

10. The method of claim 7, wherein the matrix of data bits comprises a first matrix that corresponds to a Hadamard matrix whose rows have been shuffled.

11. A system comprising:

a transmitter comprising;

a plurality of data channel inputs that receive corresponding data channel input values during each symbol time, wherein each symbol time comprises a plurality of chip times;

a coder that codes each data channel input value with a corresponding data channel code value;

a multiplexer that selects a data channel code value for one of the data channel inputs during each chip time; and

transmit circuitry that transmits the selected data channel code value during each chip time to a receiver; and

a receiver comprising;

receive circuitry that receives data during each chip time;

a demultiplexer that associates the received data with a particular data channel;

a decoder that decodes data received during multiple chip times for each data channel; and

a plurality data channel outputs that each provide decoded data for each data channel during a symbol time.

12. The system of claim 11, further comprising a controller that controls both the coder and the multiplexer based on a matrix of data bits.

13. The system of claim 12, wherein the controller controls the coder and multiplexer based on values in a different row of the matrix of data bits during each chip time.

14. The system of claim 12, wherein the matrix of data bits comprises a first matrix that is derived from a matrix having randomly or pseudo-randomly shuffled rows.

15. The system of claim 12, wherein the matrix of data bits comprises a first matrix that is derived from a Hadamard matrix whose rows have been shuffled.

16. The system of claim 12, wherein the transmitter comprises a transmitter counter that is incremented during each chip time, and wherein the receiver comprises a receiver counter that is incremented during each chip time that is synchronized with the transmitter counter.

17. The system of claim 12, wherein the transmitter further comprises a transmitter counter that indexes a row in the matrix of bits, and during each chip time, a first portion of indexed row controls the coder and a second portion of the indexed row controls the multiplexer.

18. The system of claim 12, wherein the receiver further comprises a receiver counter that indexes a row in the matrix of bits, and during each chip time, a first portion of the indexed row controls the demultiplexer and a second portion of the indexed row controls the decoder.

19. The system of claim 11, wherein the receiver further comprises a plurality of correlators that are employed, over the course of each symbol time, by the decoder to decode received data for each data channel.

20. The system of claim 19, wherein the plurality of correlators calculate a correlation between received data and each of a plurality of possible data channel code values.

21. The system of claim 12, wherein the controller controls the multiplexer based on a first subset of the columns of the matrix of data bits, and the controller controls the coder based on a second subset of the columns of the matrix of data bits, the second subset being different from the first subset.

22. The system of claim 12, wherein the controller controls both the decoder and the demultiplexer based on the matrix of data bits.

23. The system of claim 22, wherein the controller controls the demultiplexer based on a first subset of the columns of the matrix of data bits, and the controller controls the decoder based on a second subset of the columns of the matrix of data bits, the second subset being different from the first subset.