Analog to digital ramp converter

• US 8,659,465 B2
• Filed: 11/10/2011
• Issued: 02/25/2014
• Est. Priority Date: 11/18/2010
• Status: Active Grant

• Current Assignee: Stmicroelectronics France (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SA (STMicroelectronics NV), STMicroelectronics SAS (STMicroelectronics NV)
• Inventors: Simony, Laurent, Cellier, Alexandre, Barbier, Frdric, Deschamps, Benot
• Primary Examiner(s): YOUNG, BRIAN K
• Application Number:
  US13/293,969
• Publication Number:
  US 20120126094A1
• Time in Patent Office: 838 Days
• Field of Search: 341/169, 341/170, 341/164, 341/155
• US Class Current: 341/169
• CPC Class Codes: H03M 1/201 by dithering
• CPC Class Codes: H03M 1/56 Input signal compared with linear ramp
• CPC Class Codes: H03M 1/58 Non-linear conversion

Abstract

A method of analog to digital voltage conversion including: generating a quadratic signal based on an analog time varying reference signal; generating a ramp signal based on the quadratic signal; and converting an analog input voltage to a digital output value based on a time duration determined by a comparison of the analog input voltage with the ramp signal.

Claims

1. A method of analog to digital voltage conversion comprising:

generating a quadratic signal based on an analog time varying reference signal;

generating a ramp signal based on said quadratic signal, wherein generating said ramp signal further comprises generating a linear signal and summing said linear and quadratic signals to generate said ramp signal, and wherein said quadratic signal is offset by a reference time with respect to said linear signal such that said ramp signal comprises a linear portion up to said reference time; and

converting an analog input voltage to a digital output value based on a time duration determined by a comparison of said analog input voltage with said ramp signal.

2. The method of claim 1, wherein generating said quadratic signal comprises converting a digital time signal into said quadratic signal based on said analog time varying reference signal.

3. The method of claim 1, wherein said ramp signal comprises a linear portion followed by a portion equal to the sum of a linear signal and said quadratic signal.

4. The method of claim 1, wherein the derivative of said ramp signal is continuous.

5. The method of claim 1, wherein said analog input signal is the output of an image sensor, said method further comprising, prior to converting said analog input signal:

applying, during an initialization phase, a first voltage level of said ramp signal and a first reference value via respective capacitors to an input terminal of an amplifier, wherein said linear portion of said ramp signal starts at a voltage level lower than said first voltage level, and said reference time occurs when the voltage level of the ramp signal is equal to or higher than said first voltage level.

7. The method of claim 1, further comprising linearizing said digital output value.

8. The method of claim 7, further comprising adding a random value to said M-bit value.

6. A method of analog to digital voltage conversion comprising:

generating a quadratic signal based on an analog time varying reference signal;

generating a ramp signal based on said quadratic signal, and

converting an analog input voltage to a digital output value based on a time duration determined by a comparison of said analog input voltage with said ramp signal, wherein said converting step comprises starting an N-bit counter at a start of said ramp signal, and storing the N-bit value of said counter when a voltage level of said ramp signal corresponds to the level of said analog input voltage, wherein said counter increments in a linear manner, the method further comprising linearizing said digital output value by converting it into an M-bit value, wherein M is equal to at least N+1.

9. An analog to digital converter comprising:

a ramp generator adapted to generate;

a quadratic signal based on an analog time varying reference signal; and

a ramp signal based on said quadratic signal, wherein said ramp generator comprises a first digital to analog converter arranged to generate said quadratic signal by converting a digital time signal into said quadratic signal based on an analog time varying reference signal, wherein said quadratic signal and said analog time varying reference signal are currents, and wherein said ramp generator further comprises a second digital to analog converter arranged to convert said digital time signal into said time varying reference signal based on a reference current; and

circuitry adapted to convert an analog input voltage to a digital output value based on a time duration determined by a comparison of said analog input voltage with said ramp signal.

10. The analog to digital converter of claim 9, wherein said ramp generator further comprises:

a third analog to digital converter arranged to convert said digital time signal into a second analog current; and

at least one resistor receiving said first and second analog currents to generate said ramp signal.

12. An image sensor comprising an array of pixel cells, each column of pixels cells being coupled to an analog to digital converter according to claim 9.

11. An analog to digital converter comprising:

a ramp generator adapted to generate;

a quadratic signal based on an analog time varying reference signal; and

a ramp signal based on said quadratic signal; and

circuitry adapted to convert an analog input voltage to a digital output value based on a time duration determined by a comparison of said analog input voltage with said ramp signal, wherein said digital output value is an N-bit value, and further comprising adjustment circuitry adapted to convert said N-bit digital output value into an M-bit value based on a lookup table, wherein M is equal to at least N+1.

13. A method for analog to digital conversion, comprising:

generating a ramp signal that includes a quadratic signal and a linear signal, wherein generating the ramp signal comprises summing the quadratic signal and the linear signal;

converting an analog input voltage to an N-bit value, including comparing the analog input voltage to the ramp signal and controlling storage of the N-bit value based on the comparison; and

converting the N-bit value to a linearized digital output value.

14. A method for analog to digital conversion as defined in claim 13, wherein the quadratic signal is started after a reference time with respect to the linear signal, such that the ramp signal is linear until the reference time has elapsed.

15. A method for analog to digital conversion as defined in claim 13, wherein the linearized digital output value has M-bits, where M is equal to at least N+1.

16. A method for analog to digital conversion as defined in claim 13, wherein converting the N-bit value to a linearized digital output value is based on a lookup table that provides the linearized digital output value in response to the N-bit value.

17. A method for analog to digital conversion as defined in claim 16, further comprising adding a random value to the linearized digital output value.

18. A method for analog to digital conversion as defined in claim 13, wherein generating the ramp signal comprises converting a digital time signal into the quadratic signal based on an analog time varying reference signal.

19. A method for analog to digital conversion as defined in claim 14, wherein converting the analog input voltage to the digital output value includes applying, during an initialization phase, a first voltage level of the ramp signal and a first reference value through respective capacitors to an input terminal of an amplifier, wherein a linear portion of the ramp signal starts at a voltage level lower than the first voltage level, and the reference time occurs when the voltage level of the ramp signal is equal to or greater than the first voltage level.

20. A method for analog to digital conversion as defined in claim 13, wherein comparing and controlling comprises starting a counter at a start of the ramp signal and storing the value of the counter as the N-bit value when a level of the ramp signal is equal to a level of the analog input voltage.

21. A method for analog to digital conversion as defined in claim 20, wherein the counter increments linearly.

22. An analog to digital converter comprising:

a ramp generator configured to generate a ramp signal that includes a quadratic signal and a linear signal, wherein the ramp generator is configured to start the quadratic signal after a reference time with respect to the linear signal, such that the ramp signal is linear until the reference time has elapsed;

a conversion circuit configured to convert an analog input voltage to an N-bit value, the conversion circuit including a comparison circuit configured to compare the analog input voltage to the ramp signal and to control storage of the N-bit value based on the comparison; and

an adjustment circuit configured to convert the N-bit value to a linearized digital output value.

23. An analog to digital converter as defined in claim 22, wherein the linearized digital output value has M bits, where M is equal to at least N+1.

24. An analog to digital converter as defined in claim 22, wherein the adjustment circuit includes a lookup table that provides the linearized digital output value in response to the N-bit value.

25. An analog to digital converter as defined in claim 24, wherein the adjustment circuit is configured to add a random value to the linearized digital output value.

26. An analog to digital converter as defined in claim 22, wherein the ramp generator comprises a first digital to analog converter configured to generate the quadratic signal by converting a digital time signal into the quadratic signal based on an analog time varying reference signal, wherein the quadratic signal and the analog time varying reference signal are currents, and a second digital to analog converter configured to convert the digital time signal into the time varying reference signal based on a reference current.

27. An analog to digital converter as defined in claim 26, wherein the ramp generator further comprises a third analog to digital converter configured to convert the digital time signal into a second analog current, and at least one resistor configured to receive the first and second analog currents to generate the ramp signal.