Display apparatus

• US 8,659,583 B2
• Filed: 01/12/2011
• Issued: 02/25/2014
• Est. Priority Date: 02/05/2010
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Cho, Yeon-Je
• Primary Examiner(s): NGUYEN, JENNIFER T
• Application Number:
  US13/005,144
• Publication Number:
  US 20110193830A1
• Time in Patent Office: 1,140 Days
• Field of Search: 345 76-100, 345204-206, 349/40, 349151-152
• US Class Current: 345/204
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2310/0218 with collection of electrodes in groups for n-dimensional addressing
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

A display apparatus in which data lines of first and second sides of the display panel are connected is disclosed. In some embodiments, the display apparatus includes gate driving units respectively driving the first and second sides of the panel. The surface area of a data driving block which occupies a large portion of a driver circuit is, accordingly, reduced.

Claims

1. A display apparatus, comprising:

a display panel in which a plurality of data lines of a first side of the panel and a plurality of data lines of a second side of the panel are connected to one another with connections which are schematically symmetric about a line between the data lines of the first and second sides;

a first gate driving unit for providing a gate signal to the first side of the panel;

a second gate driving unit for providing a gate signal to the second side of the panel; and

a driver circuit configured to control the first gate driving unit and the second gate driving unit, and to provide a data signal to the data lines of the first side of the panel and to the data lines of the second side of the panel;

wherein the driver circuit is further configured to generate a first gate control signal to the first gate driving unit and a second gate control signal to the second gate driving unit, and

wherein each gate control signal comprises a vertical synchronization start signal that is applied to each gate driving unit at the same time.

2. The display apparatus of claim 1, wherein the driver circuit is an integrated circuit (IC).

3. The display apparatus of claim 1, wherein the driver circuit comprises:

a data driving unit configured to provide a data signal to the first side of the panel and to the second side of the panel; and

a signal control unit configured to provide a first gate control signal to the first gate driving unit, a second gate control signal to the second gate driving unit, and a data control signal to the data driving unit.

4. The display apparatus of claim 1, wherein the first gate driving unit and the second gate driving unit are mounted to the display panel.

5. The display apparatus of claim 1, wherein the display panel is an amorphous silicon gate (ASG) panel.

6. The display apparatus of claim 1, wherein the display panel is a low temperature polysilicon (LTPS) panel.

7. The display apparatus of claim 1, wherein the display panel is a liquid crystal display (LCD) panel.

8. The display apparatus of claim 1, wherein the display panel is an organic light emitting diode (OLED) panel.

9. A display apparatus, comprising:

a display panel, comprising;

n gate lines,

m data lines crossing the n gate lines;

a plurality of pixel units disposed near crossing points of the gate lines and the data lines,

wherein a first side of the panel has first through m/2-th data lines and a second side of the panel has (m/2+1)-th through m-th data lines, and

wherein the first through m/2-th data lines and m-th through (m+2)/2 data lines are respectively sequentially connected with connections which are schematically symmetric about a line between the data lines of the first and second sides of the panel;

a first gate driving unit configured to provide a gate signal to the first side of the panel with a portion of the n gate lines;

a second gate driving unit for providing a gate signal to the second side of the panel with another portion of the n gate lines; and

a driver circuit configured to control the first and second gate driving units and to provide a data signal to the first and second sides of the panel with the first through m/2-th data lines;

wherein the driver circuit is further configured to generate a first gate control signal to the first gate driving unit and a second gate control signal to the second gate driving unit, and

wherein each gate control signal comprises a vertical synchronization start signal that is applied to each gate driving unit at the same time.

10. The display apparatus of claim 9, wherein the driver circuit is an integrated circuit (IC).

11. The display apparatus of claim 9, wherein the driver circuit comprises:

a data driving unit configured to provide a data signal to the first and second sides of the panel via the first through m/2 data lines; and

a signal control unit configured to provide a first gate control signal to the first gate driving unit, a second gate control signal to the second gate driving unit, and a data control signal to the data driving unit.

12. The display apparatus of claim 9, wherein the first gate driving unit and the second gate driving unit are mounted on the display panel.

13. The display apparatus of claim 9, wherein the display panel is an amorphous silicon gate (ASG) panel.

14. The display apparatus of claim 9, wherein the display panel is a low temperature polysilicon (LTPS) panel.

15. The display apparatus of claim 9, wherein the display panel is a liquid crystal display (LCD) panel.

16. The display apparatus of claim 9, wherein the display panel is an organic light emitting diode (OLED) panel.

17. A display apparatus, comprising:

a display panel having a plurality of pixels in which a plurality of data lines of a first side of the panel and a plurality of data lines of a second side of the panel are connected to one another with connections which are schematically symmetric about a line between the data lines of the first and second sides of the panel;

a driver circuit configured to provide a data signal to the data lines of the first side of the panel and to the data lines of the second side of the panel with the data lines of one of the first and second sides of the panel;

wherein first ones of the pixels on the first side of the display panel and second ones of the pixels on the second side of the display panel are connected to the data lines on their respective side of the display panel;

a first gate driver providing a gate signal to the pixels on the first side of the display panel;

a second gate driver providing a gate signal to the pixels on the second side of the display panel;

wherein the driver circuit is further configured to generate a first gate control signal to the first gate driver and a second gate control signal to the second gate driver, and

wherein each gate control signal comprises a vertical synchronization start signal that is applied to each gate driver at the same time.

18. The display apparatus of claim 17, wherein the driver circuit comprises:

a data driving unit configured to provide the data signal according to a data control signal; and

a signal control unit configured to provide the data control signal to the data driving unit.