Electrical circuit with a nanostructure and method for producing a contact connection of a nanostructure

• US 8,664,657 B2
• Filed: 10/11/2005
• Issued: 03/04/2014
• Est. Priority Date: 10/11/2004
• Status: Expired due to Fees

• Current Assignee: Polaris Innovations Limited (Wi-LAN Inc.)
• Original Assignee: Qimonda AG (Infineon Technologies AG)
• Inventors: Duesberg, Georg, Kreupl, Franz, Seidel, Robert, Steinlesberger, Gernot
• Primary Examiner(s): Nguyen, Simon
• Application Number:
  US11/577,070
• Publication Number:
  US 20090213830A1
• Time in Patent Office: 3,066 Days
• Field of Search: 455/333, 977742-752, 977842-848, 438/142, 438/149, 438/479, 438/532, 438/795, 257/9, 257/184, 257/E21.09, 257/E51.04, 257/49, 257/51, 257/64, 257/66, 257/73
• US Class Current: 257/49
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H10K 71/60 Forming conductive regions or layers, e.g. electrodes
• CPC Class Codes: H10K 85/221 Carbon nanotubes

Abstract

A circuit is disclosed. The circuit includes at least one nanostructure and a carbon interconnect formed by a substantially carbon layer, wherein the nanostructure and the carbon interconnect are directly coupled to one another.

Claims

1. A circuit comprising:

at least one nanostructure; and

a carbon interconnect formed by a layer essentially comprising carbon,

wherein the nanostructure and the carbon interconnect are directly coupled to one another,

wherein a thickness of the layer is controlled by means of the duration of a layer deposition process; and

wherein the layer essentially comprising carbon is a polycrystalline carbon layer including crystalline regions having hexagonal lattice structures separated by regions having no hexagonal lattice structures or separated by regions having hexagonal lattice structures that have an orientation arranged differently than the adjacent crystalline regions.

2. The circuit as claimed in claim 1, in which the nanostructure is a nanotube or a nanowire.

3. The circuit of claim 2, in which the layer is free of nanotubes or nanowires.

4. The circuit as claimed in claim 1, in which the nanostructure is a carbon nanostructure.

5. The circuit as claimed in claim 1, in which the electrical circuit has a transistor, in which the channel region of the transistor has the nanostructure and one of the source/drain regions of the transistor has the carbon interconnect.

6. The circuit as claimed in claim 1, which has at least one via that connects two planes of the electrical circuit to one another, in which the nanostructure is arranged in the at least one via and in which the carbon interconnect is arranged in one of the two planes.

7. The circuit as claimed in claim 6, in which an additional carbon interconnect is arranged in the other of the two planes, which additional carbon interconnect is likewise directly coupled to the nanostructure.

8. The circuit as claimed in claim 1, in which the carbon interconnect has a resistivity of between 1 μ

Ω

cm and 1000 μ

Ω

cm.

9. The circuit as claimed in claim 1, in which the carbon interconnect has a resistivity of between 1 μ

Ω

cm and 50 μ

Ω

cm.

10. The circuit of claim 1, in which the layer is free of the nanostructure.

11. The circuit of claim 1, in which the layer encloses the nanostructure.

12. The circuit of claim 1, further comprising:

a layer of tetraethyl orthosilicate or spin-on glass formed on the nanostructure and directly contacting the carbon interconnect.

13. A method for producing a circuit including a contact-connection of a nanostructure on a substrate, comprising:

forming a nanostructure; and

forming a carbon interconnect, where the nanostructure and the carbon interconnect are formed in such a way that they make direct contact with one another, wherein the carbon interconnect is formed by a layer essentially comprising carbon, wherein a thickness of the layer is controlled by means of the duration of a layer deposition process, and wherein the layer essentially comprising carbon is a polycrystalline carbon layer including crystalline regions having hexagonal lattice structures separated by regions having no hexagonal lattice structures or separated by regions having hexagonal lattice structures that have an orientation arranged differently than the adjacent crystalline regions.

14. The method as claimed in claim 13, comprising forming the nanostructure on the substrate and forming the carbon interconnect at the nanostructure.

15. The method of claim 14, in which the layer is free of nanotubes or nanowires.

16. The method as claimed in claim 13, comprising forming the carbon interconnect on the substrate and forming the nanostructure at the carbon interconnect.

17. The method as claimed in claim 13, in which the carbon interconnect is doped and/or intercalated.

18. The method as claimed in claim 17, comprising thermally activating an activation of the doped and/or intercalated carbon interconnect.

19. The method as claimed in claim 17, carrying out a selective activation of the doped and/or intercalated carbon interconnect by a laser.

20. The method of claim 13, in which the layer is free of the nanostructure.

21. The method of claim 13, in which the layer encloses the nanostructure.

22. The method of claim 13, further comprising:

forming a layer of tetraethyl orthosilicate or spin-on glass on the nanostructure prior to forming the carbon interconnect.