Carrier and optical semiconductor device based on such a carrier

• US 8,664,683 B2
• Filed: 12/14/2007
• Issued: 03/04/2014
• Est. Priority Date: 12/21/2006
• Status: Active Grant

• Current Assignee: Lumileds LLC (Apollo Global Management, Inc.)
• Original Assignee: Koninklijke Philips N.V.
• Inventors: Steenbruggen, Gerardus Henricus Franciscus Willebrordus
• Primary Examiner(s): Li, Meiya
• Application Number:
  US12/519,431
• Publication Number:
  US 20100044746A1
• Time in Patent Office: 2,272 Days
• Field of Search: 257/79, 257/81, 257/95, 257 98-100, 257/103, 257/189, 257/680, 257/704, 257/E33.056, 257/E33.058, 257/E33.061, 257/E33.067, 257/E33.07, 257/E33.072, 257/E33.073, 257/E25.032, 438/28, 438/29, 438/34, 438/35, 438/69, 438/70, 438/72, 438/106, 438/FOR.157, 438/FOR.453, 362/612, 362/618, 362/622, 362/627, 362/629, 362/632, 362/555, 362/583, 313/483, 313/489, 313501-504
• US Class Current: 257/99
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 31/0203 Containers; Encapsulations , e.g. encapsulation of photodiodesfor photovoltaic devices H01L31/048; for organic photosensitive devices H10K30/80
• CPC Class Codes: H01L 31/02325 the optical elements not being integrated nor being directly associated with the device
• CPC Class Codes: H01L 33/486 adapted for surface mounting
• CPC Class Codes: H01L 33/54 having a particular shape
• CPC Class Codes: Y10T 156/10 Methods of surface bonding and/or assembly therefor

Abstract

A method for providing, on a carrier (40), an insulative spacer layer (26) which is patterned such that a cavity (27) is formed which enables connection of an optical semiconductor element (41) to the intended conductor structure (22) when placed inside the cavity (27). The cavity (27) is formed such that it, through its shape, extension and/or depth, accurately defines a location of an optical element (45; 61) in relation to the optical semiconductor element (41). Through the provision of such a patterned insulative spacer layer, compact and cost-efficient optical semiconductor devices can be mass-produced based on such a carrier without the need for prolonged development or acquisition of new and expensive manufacturing equipment.

Claims

1. An optical semiconductor device comprising:

a carrier for enabling accurate positioning of a first optical element in relation to an optical semiconductor element, said carrier comprising;

an electrically conductive multi-layer carrier base sheet having an upper carrier layer, a lower carrier layer, and an intermediate carrier layer between said upper carrier layer and said lower carrier layer, said upper carrier layer and said intermediate carrier layer having an upper conductor structure formed in said upper carrier layer and said intermediate carrier layer; and

a patterned insulative spacer layer arranged on an upper carrier layer side of said carrier base sheet and arranged such that at least a portion of the patterned insulative spacer layer is disposed below said upper carrier layer, wherein;

said patterned insulative spacer layer is patterned such that at least one cavity is formed in which said optical semiconductor element is connectable to said upper conductor structure, a depth of said cavity being greater than a height of the optical semiconductor element when connected to said carrier; and

said cavity is formed to define a location of said first optical element in relation to said optical semiconductor element;

the optical semiconductor element connected to said upper conductor structure in the cavity formed by said patterned insulative spacer layer; and

said first optical element is provided in said location defined by said patterned insulative spacer layer.

2. The optical semiconductor device according to claim 1, wherein said optical semiconductor element is connected to said upper conductor structure by bumps that are provided on the optical semiconductor element and are connected to pads in the upper conductor structure.

3. The optical semiconductor device according to claim 1, wherein an extension of said first optical element is determined by said cavity.

4. The optical semiconductor device according to claim 1, wherein a space defined by said cavity and said first optical element is at least partially filled with a resilient optical compound, for reducing stress on the optical semiconductor device.

5. The optical semiconductor device according to claim 1, wherein the carrier further comprises:

an intermediate insulative layer arranged between said upper carrier layer and said patterned insulative spacer layer,

wherein said intermediate insulative layer is configured such that an electrical connection between connector bumps provided on said optical semiconductor element and said upper conductor structure is implemented through said intermediate insulative layer by applying heat and pressure to said optical semiconductor element when the optical semiconductor element is positioned on said intermediate insulative layer with said connector bumps facing the intermediate insulative layer.