Methods and devices for fabricating and assembling printable semiconductor elements

• US 8,664,699 B2
• Filed: 03/13/2013
• Issued: 03/04/2014
• Est. Priority Date: 06/04/2004
• Status: Active Grant

• Current Assignee: Board of Trustees of The University of Illinois
• Original Assignee: Board of Trustees of The University of Illinois
• Inventors: Nuzzo, Ralph G., Rogers, John A., Menard, Etienne, Lee, Keon Jae, Khang, Dahl-Young, Sun, Yugang, Meitl, Matthew, Zhu, Zhengtao
• Primary Examiner(s): Mandala, Michelle
• Application Number:
  US13/801,868
• Publication Number:
  US 20130320503A1
• Time in Patent Office: 356 Days
• Field of Search: 438/106, 438/472, 438/700, 438/735, 438/484, 438/490, 438/479, 438/694, 257/213, 257/499, 257/E21.499, 257/E23.065, 257/E23.177, 257/E21.505, 257/E21.567, 257/E21.122, 257/E29.327, 257/E29.242, 257/E29.024
• US Class Current: 257/213
• CPC Class Codes: B81C 2201/0185 Printing, e.g. microcontact printing
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H01L 21/02521 Materials
• CPC Class Codes: H01L 21/02603 Nanowires
• CPC Class Codes: H01L 21/02628 using solutions
• CPC Class Codes: H01L 21/308 using masks H01L21/3063, H01L21/3065 take precedence
• CPC Class Codes: H01L 21/322 to modify their internal properties, e.g. to produce internal imperfections
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68368 used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
• CPC Class Codes: H01L 2221/68381 Details of chemical or physical process used for separating the auxiliary support from a device or wafer
• CPC Class Codes: H01L 2224/03 Manufacturing methods
• CPC Class Codes: H01L 2224/0332 Screen printing, i.e. using a stencil
• CPC Class Codes: H01L 2224/0345 Physical vapour deposition [PVD], e.g. evaporation, or sputtering
• CPC Class Codes: H01L 2224/03614 by chemical means only
• CPC Class Codes: H01L 2224/0362 Photolithography
• CPC Class Codes: H01L 2224/05073 Single internal layer
• CPC Class Codes: H01L 2224/05082 Two-layer arrangements
• CPC Class Codes: H01L 2224/05124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05166 : Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05552 : in top view
• CPC Class Codes: H01L 2224/05553 : being rectangular
• CPC Class Codes: H01L 2224/05554 : being square
• CPC Class Codes: H01L 2224/05555 : being circular or elliptic
• CPC Class Codes: H01L 2224/05644 : Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05666 : Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/08225 : the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/2919 : with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32225 : the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/80 : Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
• CPC Class Codes: H01L 2224/80006 : being a temporary or sacrificial substrate
• CPC Class Codes: H01L 2224/80121 : Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
• CPC Class Codes: H01L 2224/80862 : Heat curing
• CPC Class Codes: H01L 2224/80895 : between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
• CPC Class Codes: H01L 2224/83 : using a layer connector
• CPC Class Codes: H01L 2224/83005 : being a temporary or sacrificial substrate
• CPC Class Codes: H01L 2224/83121 : Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
• CPC Class Codes: H01L 2224/83192 : wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83193 : wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/8385 : using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 2224/83862 : Heat curing
• CPC Class Codes: H01L 2224/9202 : Forming additional connectors after the connecting process
• CPC Class Codes: H01L 2224/94 : at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 2224/95 : at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
• CPC Class Codes: H01L 2224/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/02 : Containers; Seals H01L23/12, H01L23/34, H01L23/48, H01L23/552, H01L23/66 take precedence; for memories G11C
• CPC Class Codes: H01L 24/03 : Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/08 : of an individual bonding area
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/80 : Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/94 : at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0753 : the devices being arranged next to each other
• CPC Class Codes: H01L 27/1285 : using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
• CPC Class Codes: H01L 27/1292 : using liquid deposition, e.g. printing
• CPC Class Codes: H01L 29/04 : characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/06 : characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
• CPC Class Codes: H01L 29/0665 : the shape of the body defining a nanostructure nanotechnology per se B82B
• CPC Class Codes: H01L 29/0673 : oriented parallel to a substrate
• CPC Class Codes: H01L 29/0676 : oriented perpendicular or at an angle to a substrate
• CPC Class Codes: H01L 29/068 : comprising a junction
• CPC Class Codes: H01L 29/12 : characterised by the materials of which they are formed
• CPC Class Codes: H01L 29/76 : Unipolar devices , e.g. field effect transistors
• CPC Class Codes: H01L 29/78603 : characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78681 : having a semiconductor body comprising AIIIBV or AIIBVI or AIVBVI semiconductor materials, or Se or Te
• CPC Class Codes: H01L 29/78696 : characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01032 : Germanium [Ge]
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/12032 : Schottky diode
• CPC Class Codes: H01L 2924/12036 : PN diode
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/12043 : Photo diode
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13063 : Metal-Semiconductor Field-Effect Transistor [MESFET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1461 : MEMS
• CPC Class Codes: H01L 2924/15159 : Side view
• CPC Class Codes: H01L 2924/15162 : Top view
• CPC Class Codes: H01L 2924/15788 : Glasses, e.g. amorphous oxides, nitrides or fluorides
• CPC Class Codes: H01L 2924/1579 : with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 31/0392 : including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate textured substrates H01L31/02366
• CPC Class Codes: H01L 31/03926 : comprising a flexible substrate
• CPC Class Codes: H01L 31/1804 : comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/1864 : Annealing
• CPC Class Codes: H01L 31/1896 : for thin-film semiconductors
• CPC Class Codes: H01L 33/007 : comprising nitride compounds
• CPC Class Codes: H01L 33/0093 : Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/32 : containing nitrogen
• CPC Class Codes: Y02E 10/547 : Monocrystalline silicon PV cells
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product
• CPC Class Codes: Y10S 977/707 : having different types of nanoscale structures or devices on a common substrate
• CPC Class Codes: Y10S 977/724 : Devices having flexible or movable element

Abstract

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Claims

1. An electrical device comprising:

a first electrode;

a second electrode; and

a printable semiconductor element positioned in electrical contact with said first and second electrodes, said printable semiconductor element comprising a unitary inorganic semiconductor structure and wherein said printable semiconductor element provides a fill factor between said first and second electrodes greater than or equal to about 20%.

2. The electrical device of claim 1 wherein said printable semiconductor element provides a fill factor between said first and second electrodes greater than or equal to about 50%.

3. The electrical device of claim 1 wherein said printable semiconductor element comprises a microstructured printable semiconductor element or a nanostructured printable semiconductor element.

4. The electrical device of claim 1 wherein said printable semiconductor element has a shape selected from the group consisting of

a ribbon;

a platelet;

a column;

a cylinder;

a disc; and

a block.

5. The electrical device of claim 1 further comprising at least one additional printable semiconductor element, wherein additional printable semiconductor elements are in electrical contact with said first and second electrodes.

6. A method for fabricating a printable semiconductor element connected to a mother wafer via one or more alignment maintaining elements, said method comprising the steps of:

providing said mother wafer having an external surface, said mother wafer comprising an inorganic semiconductor material;

masking a selected region of said external surface by applying a mask;

etching said external surface of said mother wafer, thereby generating a relief structure and at least one exposed surface of said mother wafer, wherein said relief structure has a masked side and one or more unmasked sides;

etching said at least one exposed surface of said mother wafer; and

stopping etching of said at least one exposed surface so that complete release of said relief structure is prevented, thereby fabricating said printable semiconductor element connected to said mother wafer via one or more alignment maintaining elements.

7. The method of claim 6 wherein said printable semiconductor element has a peanut shape with a first end and a second end, wherein said alignment maintaining elements connect said first and second ends of said printable semiconductor element to said mother wafer.

8. The method of claim 6 wherein said printable semiconductor element has a ribbon shape with a first end and a second end, wherein said alignment maintaining elements connect said first and second ends of said printable semiconductor element to said mother wafer.