System, method and emulation circuitry useful for adjusting a characteristic of a periodic signal

• US 8,664,986 B2
• Filed: 07/09/2012
• Issued: 03/04/2014
• Est. Priority Date: 07/28/2011
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Wang, Robert, Pialis, Antonios, Mahadevan, Rajeevan, Yaghini, Navid, Karakiewicz, Rafal, Tang, Raymond Kwok Kei, Shen, Sida
• Primary Examiner(s): POOS, JOHN W
• Application Number:
  US13/543,991
• Publication Number:
  US 20130027099A1
• Time in Patent Office: 603 Days
• Field of Search: 327/156, 327/157, 327/158
• US Class Current: 327/156
• CPC Class Codes: H03L 7/0891 the up-down pulses controlling source and sink current generators, e.g. a charge pump
• CPC Class Codes: H03L 7/091 the phase or frequency detector using a sampling device H03L7/087 takes precedence

Abstract

Systems, methods and circuitry useful for adjusting a periodic signal such as with a voltage controlled oscillator or a delay line. In one series of embodiments, circuits and methods are provided for controlling current flow through first and second parallel paths where an impedance device in one path emulates the impedance characteristics of a different device in the other path. A phase or frequency characteristic of the periodic signal may be adjusted by alternate switching of current through the two paths.

Claims

1. A method of changing the phase or frequency of a first periodic signal output from a first nonlinear device having a nonlinear impedance characteristic with respect to a second periodic signal, the first nonlinear device having a voltage operating range, the method comprising:

providing discrete control signal types of variable time width in proportion to a phase difference between the first and second signals, a first type of the discrete control signal types indicative of a negative difference in phase or frequency of the first periodic signal relative to the phase or frequency of the second periodic signal, and a second type of the discrete control signal types indicative of a positive difference in phase or frequency of the first periodic signal relative to the phase or frequency of the second periodic signal;

periodically applying control signals of the first type to a first switching device to control current flow along a first circuit path from a voltage source through the first switching device, through the first nonlinear device and to a reference voltage terminal to adjust a phase or frequency characteristic of the first periodic signal output from the first nonlinear device; and

periodically applying signals of the second type to a second switching circuitry to control current flow along a second circuit path in parallel with the first circuit path from the voltage source through the second switching device, through a second impedance device having a nonlinear impedance characteristic and to the reference voltage terminal,

wherein the first and second switching devices are operated in to response to variations in the signals of the first and second types to switch current flow between the first and second circuit paths so that at times current flows only through the first circuit path and then only through the second circuit path, wherein;

the first nonlinear device does not incorporate a charge pump circuitry to store charge in a capacitor for input to the voltage controlled oscillator (VCO);

impedance characteristics of the first nonlinear device and the second nonlinear impedance device are so matched that current-voltage characteristics of the first nonlinear device and the second impedance device are within five percent of one another throughout the voltage operating range of the VCO;

the first circuit path includes a first load device comprising three stage inverter ring oscillator; and

the second circuit path includes a second load device which is a sub circuit having characteristics which track the impedance characteristics of the VCO.

2. The method of claim 1 wherein, to change the phase or frequency of the first periodic signal, with application of the signal types to the switching devices:

during a portion Δ

t of a period of the first or second periodic signal, one of the first and second switching devices is in a conduction mode while the other switching device is not in a conduction mode, thereby providing current flow only through the first nonlinear device in the first branch or providing current flow only through the second impedance device in the second branch or providing no current flow through the first nonlinear device and no current flow through the second impedance device.

3. The method of claim 1, wherein the first nonlinear device is a voltage controlled oscillator.

4. A system comprising proportional path circuitry for use in changing the phase or frequency of a first periodic signal with respect to a second periodic signal based on an output from a comparator, the system comprising:

a detector for determining a phase or frequency difference between the first and second periodic signals, which provides discrete periodic signal types of variable time width in proportion to a phase difference between the first and second periodic signals, a first type of the discrete periodic signal types indicative of a negative difference in phase or frequency of the first periodic signal relative to the phase or frequency of the second periodic signal, and a second type of the discrete periodic signal types indicative of a positive difference in phase or frequency of the first periodic signal relative to the phase or frequency of the second periodic signal;

switching circuitry including first and second parallel branches, each parallel branch coupled between a supply voltage connection, VDD, and a reference voltage connection, VSS, each parallel branch including a first switching device and a load device, the first switching device of the first parallel branch and the first switching device of the second parallel branch each coupled to receive a different one of the discrete periodic signal types as an input signal to place the first switching device in a mode to conduct current between the supply voltage connection and the reference voltage connection or in a non-conducting mode wherein, during circuit operation, to change the phase or frequency of the first periodic signal, with application of the signal types to the switching devices;

during a portion Δ

t of a period of the first or second periodic signal, one of the switching devices is in a conduction mode while the other switching device is not in a conduction mode, thereby providing current flow only through the load device of the first parallel branch or providing current flow only through the load device of the second parallel branch or providing no current flow through either load device,

wherein the first load device comprises a three stage inverter ring oscillator and the second load device comprises a sub circuit having characteristics which track the impedance characteristics of the oscillator.

5. The system with proportional path circuitry of claim 4, wherein said portion Δ

t of the period is based on a difference in time between when the first periodic signal transitions from a first voltage level to a second voltage level and when the second periodic signal transitions from the first voltage level to the second voltage level.

6. The system with proportional path circuitry of claim 5, wherein the first voltage level is a low voltage level and the second voltage level is a high voltage level.

7. The system of claim 4, wherein during circuit operation, provision of the first of the discrete periodic signal types is indicative of increasing the phase or frequency of the first periodic signal relative to the phase or frequency of the second periodic signal, and provision of the second of the discrete periodic signal types is indicative of decreasing the phase or frequency of the first periodic signal relative to the phase or frequency of the second periodic signal.

8. The system of claim 4, wherein during operation of the switching circuitry during a portion of said period of the first or second periodic signal other than during said portion Δ

t of said period, the switching devices provide a steady state current flow through one of the load devices.

9. The system of claim 4, wherein during operation of the switching circuitry during a portion of said period of the first or second periodic signal other than during said portion Δ

t of said period, the switching devices provide a steady state current flow through both load devices.

10. The system of claim 4, wherein:

each of the first and second branches includes a second switching device in parallel with the first switching device positioned in the same branch; and

each of the second switching devices is under the control of a signal type which is the inverse of the signal type applied to the first switching device of the same branch.

11. The system of claim 10, wherein:

during the portion of the period during which steady state current flows one switch in each branch provides conduction to one of the load devices and the other switch is in a non-conducting mode.

12. The system of claim 4, wherein the load device of the first branch is a voltage controlled oscillator and the load device of the second branch is a sub circuit having impedance characteristics which substantially match impedance characteristics of the voltage controlled oscillator and the system does not incorporate charge pump circuitry to store charge in a capacitor for input to the voltage controlled oscillator.

13. The system of claim 4, wherein:

the load device of the first branch is a voltage controlled oscillator and the load device of the second branch is a sub circuit having impedance characteristics which substantially match impedance characteristics of the voltage controlled oscillator; and

the impedance characteristics of the sub circuit so closely follow the impedance characteristics of the voltage controlled oscillator as a function of voltage level as to allow a voltage level to be switched between the sub circuit and the voltage controlled oscillator without creating voltage spikes larger than five percent of the voltage level input to the voltage controlled oscillator.

14. The system of claim 13, wherein the impedance characteristics of the sub circuit so closely follow the impedance characteristics of the voltage controlled oscillator as a function of voltage level as to allow a voltage level to be switched between the sub circuit and the voltage controlled oscillator without creating voltage spikes larger than two percent of the voltage level input to the voltage controlled oscillator.

15. The system of claim 13, wherein the impedance characteristics of the sub circuit so closely follow the impedance characteristics of the voltage controlled oscillator as a function of voltage level as to allow a voltage level to be switched between the sub circuit and the voltage controlled oscillator without creating voltage spikes larger than one percent of the voltage level input to the voltage controlled oscillator.

16. The system of claim 15, wherein the impedance characteristics of the sub circuit so closely follow the impedance characteristics of the voltage controlled oscillator as a function of voltage level as to prevent creation of any voltage spikes when a voltage level is switched between the sub circuit and the voltage controlled oscillator.

17. A circuit suitable for tracking impedance characteristics of an oscillator comprising a first PMOS FET, a second PMOS FET, a first NMOS FET and a second NMOS FET wherein:

the first PMOS FET has a gate region connected to receive a reference voltage;

the second NMOS FET has a gate region connected to receive a supply voltage level;

the second PMOS FET has a gate region connected to a node between the first and second NMOS FETs; and

the first NMOS FET has a gate region connected to a node between the first and second PMOS FETs,

wherein the oscillator is a three stage inverter ring oscillator and the first PMOS FET and the second NMOS FET operate in a triode mode, which corresponds to the impedances of FET transistors in the oscillator that are fully switched when associated gate bias voltage is at the supply voltage level or the reference level (ground) while the second PMOS FET and the first NMOS FET operate in the saturation mode which corresponds to the impedances of FET transistors in the oscillator that are partially switched on when associated gates are biased at a voltage between the supply voltage level and the reference level.