Method and system for reducing transceiver power via a variable symbol rate

• US 8,665,902 B2
• Filed: 09/21/2007
• Issued: 03/04/2014
• Est. Priority Date: 03/12/2007
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Powell, Scott
• Primary Examiner(s): Nguyen, Brian D
• Assistant Examiner(s): NGUYEN, TOAN D
• Application Number:
  US11/859,459
• Publication Number:
  US 20080225879A1
• Time in Patent Office: 2,356 Days
• Field of Search: 370/437, 370/443, 370/445, 370/468, 370/252, 370/338, 370/401, 370/509, 370/466, 370/469, 370/477, 370/535, 375/240, 375/240.27, 375/140, 375/343, 455/574, 714/704, 713/300, 713/600, 709/233, 710/29
• US Class Current: 370/468
• CPC Class Codes: H04L 12/40039 Details regarding the setting of the power status of a node according to activity on the bus
• CPC Class Codes: H04L 12/40136 Nodes adapting their rate to the physical link properties LAN switches H04L49/351
• CPC Class Codes: H04L 12/413 with random access, e.g. carrier-sense multiple-access with collision detection [CSMA-CD]
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

Aspects of a method and system for reducing transceiver power via a variable symbol rate are provided. In this regard, an Ethernet transmitter may be enabled to transmit data at a variable symbol rate, wherein the symbol rate is determined based on a state of a link coupled to said Ethernet transmitter and/or resources available to said Ethernet transmitter. In this regard, link state may comprise one or more of, for example, available bandwidth, bit error rate, packet error rate, and link utilization; and resources may comprise one or more of, for example, power, buffer space, and processor time. Accordingly one or more threshold for link state and/or resources may be determined and the symbol rate may be adjusted when those thresholds are exceeded. Aspects of the invention may enable defining and/or transmitting unique symbols to identify possible symbol rates and/or a change in symbol rate.

Claims

1. A method, comprising:

performing by one or more circuits and/or processors of an Ethernet PHY;

transmitting Ethernet physical layer symbols onto an Ethernet link comprising twisted pair cabling at a symbol rate having a first non-zero value;

determining an amount of data to be transmitted, said data being stored in one or more buffers of said Ethernet PHY;

adjusting said symbol rate to a second non-zero value when said amount of data falls below a first threshold, said second non-zero value being different than said first non-zero value;

wherein said second non-zero value for said symbol rate is determined based on bandwidth available on said Ethernet link and resources available to said Ethernet PHY, said resources comprising power.

2. The method according to claim 1, comprising, prior to transmitting one of a plurality of unique symbols, transmitting one or more symbols that indicate a change in said symbol rate.

3. The method according to claim 2, comprising transmitting one or more of said symbols during an inter-packet gap on said Ethernet link.

4. The method according to claim 1, comprising reducing said symbol rate to said second non-zero value when:

error rates associated with said Ethernet physical layer symbols are above a threshold;

utilization of said Ethernet link is above a threshold; and

/or

resources available to said Ethernet PHY are below a threshold.

5. The method according to claim 1, comprising increasing said symbol rate when:

error rates associated with said Ethernet physical layer symbols are below a threshold;

utilization of said Ethernet link is below a threshold; and

/or

resources available to said Ethernet PHY are above a threshold.

6. The method according to claim 1, comprising determining said second non-zero value for said symbol rate based on utilization of said Ethernet link.

7. The method according to claim 1, comprising determining said second non-zero value for said symbol rate based on a state of said Ethernet link, wherein said state of said Ethernet link comprises one or more of:

a bit error rate, a packet error rate, and a utilization of said Ethernet link.

8. A non-transitory machine-readable storage having stored thereon, a computer program having at least one code section, the at least one code section being executable by a machine comprising an Ethernet PHY for causing the machine to perform steps comprising:

transmitting Ethernet physical layer symbols onto an Ethernet link comprising twisted pair cabling at a symbol rate having a first non-zero value;

determining an amount of data to be transmitted, said data being stored in one or more buffers of said Ethernet PHY;

adjusting said symbol rate to a second non-zero value when said amount of data is below a first threshold, said second non-zero value being different than said first non-zero value;

wherein said second non-zero value for said symbol rate is determined based on bandwidth available on said Ethernet link and resources available to said Ethernet PHY, said resources comprising power.

9. The non-transitory machine-readable storage according to claim 8, wherein said at least one code section comprises code for, prior to transmitting one of a plurality of unique symbols, transmitting one or more symbols that indicate a change in said symbol rate.

10. The non-transitory machine-readable storage according to claim 9, wherein said at least one code section comprises code for transmitting one or more of said symbols during an inter-packet gap on said Ethernet link.

11. The non-transitory machine-readable storage according to claim 8, wherein said at least one code section comprises code for reducing said symbol rate to said second non-zero value when:

error rates associated with said Ethernet physical layer symbols are above a threshold;

utilization of said Ethernet link is above a threshold; and

/or

resources available to said Ethernet PHY are below a threshold.

12. The non-transitory machine-readable storage according to claim 8, wherein said at least one code section comprises code for increasing said symbol rate when:

error rates associated with said Ethernet physical layer symbols are below a threshold;

utilization of said Ethernet link is below a threshold; and

/or

resources available to said Ethernet PHY are above a threshold.

13. The non-transitory machine-readable storage according to claim 8, wherein said at least one code section comprises code for determining said second non-zero value value for said symbol rate based on utilization of said Ethernet link.

14. The non-transitory machine-readable storage according to claim 8, wherein said at least one code section comprises code for determining said second non-zero value for said symbol rate based on a state of said Ethernet link and said state of said Ethernet link comprises one or more of a hit error rate, a packet error rate, and a utilization of said Ethernet link.

15. A system, comprising:

one or more circuits and/or processors of an Ethernet PHY, said one or more circuits and/or processors being operable to;

transmit Ethernet physical layer symbols onto an Ethernet link comprising twisted pair cabling at a symbol rate having a first non-zero value;

determine an amount of data to be transmitted, said data being stored in one or more buffers of said Ethernet PHY;

adjust said symbol rate to a second non-zero value when said amount of data is below a first threshold, said second non-zero value being different than said first non-zero value;

wherein said second non-zero value for said symbol rate is determined based on bandwidth available on said Ethernet link and resources available to said Ethernet PHY, said resources comprising power.

16. The system according to claim 15, wherein said one or more circuits and/or processors are operable to, prior to transmitting one of a plurality of unique symbols, transmit one or more symbols that indicate a change in said symbol rate.

17. The system according to claim 16, wherein said one or more circuits and/or processors are operable to transmit one or more of said symbols during an inter-packet gap on said Ethernet link.

18. The system according to claim 15, wherein said one or more circuits and/or processors are operable to reduce said symbol rate to said second non-zero value when:

error rates associated with said Ethernet physical layer symbols are above a threshold;

utilization of said Ethernet link is above a threshold; and

/or

resources available to said Ethernet PHY are below a threshold.

19. The system according to claim 15, wherein said one or more circuits and/or processors are operable to increase said symbol rate when:

error rates associated with said Ethernet physical layer symbols are below a threshold;

utilization of said Ethernet link is below a threshold; and

/or

resources available to said Ethernet PHY are above a threshold.

20. The system according to claim 15, wherein said one or more circuits and/or processors enable determining said second non-zero value for said symbol rate based on utilization of said Ethernet link.

21. The system according to claim 15, wherein said one or more circuits and/or processors are operable to determine said second non-zero value for said symbol rate based on a state of said Ethernet link and said state of said Ethernet link comprises one or more of a bit error rate, a packet error rate, and a utilization of said Ethernet link.