Memory controller and operating method of memory controller
First Claim
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1. A method of operating a memory controller to control a memory device, the method comprising:
- reading a read vector from the memory device, wherein the read vector comprises a data portion and a parity portion;
estimating a number of errors from the read vector;
performing an error search on only the data portion when the estimated number of errors is below a threshold value to determine actual errors in the read vector;
performing the error search on both the data portion and the parity portion when the estimated number of errors is not below the threshold value to determine actual errors in the read vector; and
correcting the determined actual errors in the read vector.
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Abstract
A method of operating a memory controller to control a memory device includes reading a read vector from the memory device and correcting one or more errors in the read vector, where a power consumed at the correcting is varied according to the number of errors in the read vector.
22 Citations
19 Claims
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1. A method of operating a memory controller to control a memory device, the method comprising:
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reading a read vector from the memory device, wherein the read vector comprises a data portion and a parity portion; estimating a number of errors from the read vector; performing an error search on only the data portion when the estimated number of errors is below a threshold value to determine actual errors in the read vector; performing the error search on both the data portion and the parity portion when the estimated number of errors is not below the threshold value to determine actual errors in the read vector; and correcting the determined actual errors in the read vector. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A memory controller comprising:
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an error correcting code ECC encoder configured to generate a code vector to be written in a memory device by encoding a write data vector; and an ECC decoder configured to correct one or more errors in a read vector read from the memory device and to output an error-corrected data vector, wherein the read vector comprises a data portion and a parity portion, wherein the ECC decoder performs an error search on only the data portion when the number of errors is below a threshold value. - View Dependent Claims (10, 11, 12, 13, 19)
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14. A method of operating a memory controller to control a memory device, the method comprising:
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reading a read vector from the memory device that comprises a data portion and a parity portion; estimating a number of errors from the read vector; changing an operating mode of the memory controller from a normal mode to a power-saving mode when the number of estimated errors is less than a threshold value, wherein during the power-saving mode, the method comprises; performing an error search on only the data portion to determine actual errors in the read vector; and correcting the determined actual errors in the read vector. - View Dependent Claims (15, 16, 17, 18)
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Specification