Solid state imaging device having a back surface impurity layer

• US 8,669,631 B2
• Filed: 03/16/2011
• Issued: 03/11/2014
• Est. Priority Date: 03/24/2010
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Koseki, Yoshiteru
• Primary Examiner(s): Soward, Ida M
• Application Number:
  US13/049,277
• Publication Number:
  US 20110234893A1
• Time in Patent Office: 1,091 Days
• Field of Search: 257/432, 257/434, 257/435, 257/461, 257/E31.121, 257/E31.122, 257/E31.123, 257/E33.076, 257/E33.077
• US Class Current: 257/434
• CPC Class Codes: H01L 2224/11 Manufacturing methods
• CPC Class Codes: H04N 23/57 Mechanical or electrical details of cameras or camera modules specially adapted for being embedded in other devices

Abstract

A solid state imaging device according to one embodiment of the present invention includes a substrate with a solid state imaging element, a first impurity layer, a plurality of external electrodes, and a translucent substrate. The first impurity layer is formed on a back surface side of the substrate, and forms a pn junction with the substrate. The plurality of external electrodes is formed on the back surface of the substrate and is electrically connected to the solid state imaging element. The translucent substrate is fixed to the substrate.

Claims

1. A solid state imaging device comprising:

a substrate including a solid state imaging element;

a first impurity layer formed on a back surface side of the substrate and forming a pn junction with the substrate;

a plurality of external electrodes formed on the back surface of the substrate and electrically connected to the solid state imaging element; and

a translucent substrate fixed on the substrate.

2. The solid state imaging device according to claim 1, wherein the first impurity layer is an amorphous layer.

3. The solid state imaging device according to claim 1, wherein

the substrate is a P-type silicon substrate, and

the first impurity layer is an N-type impurity layer formed by injecting germanium ions to the P-type silicon substrate.

4. The solid state imaging device according to claim 1, wherein

the substrate is an N-type silicon substrate, and

the first impurity layer is a P-type impurity layer formed by injecting arsenic ions to the N-type silicon substrate.

5. The solid state imaging device according to claim 1, wherein the first impurity layer is formed on the back surface of the substrate.

6. The solid state imaging device according to claim 1, wherein the first impurity layer is formed inside the substrate.

7. The solid state imaging device according to claim 1, further comprising a second impurity layer formed inside the substrate and having the same conductivity as the first impurity layer.

8. The solid state imaging device according to claim 7, wherein

the substrate is a P-type silicon substrate, and

the second impurity layer is an N-type impurity layer formed by injecting boron ions to the P-type silicon substrate.

9. The solid state imaging device according to claim 7, wherein

the substrate is an N-type silicon substrate, and

the second impurity layer is a P-type impurity layer formed by injecting phosphorous ions to the N-type silicon substrate.

10. The solid state imaging device according to claim 7, wherein the second impurity layer is formed on the first impurity layer.

11. The solid state imaging device according to claim 7, wherein the second impurity layer is formed above the first impurity layer.

12. The solid state imaging device according to claim 1, wherein

the substrate is a substrate including a plurality of through-holes, and

a ground wiring for electrically connecting the solid state imaging element and the plurality of external electrodes and for grounding the solid state imaging element is formed on side surfaces of some of the plurality of through-holes.