Display device with an oxide semiconductor including a crystal region

• US 8,674,354 B2
• Filed: 09/13/2012
• Issued: 03/18/2014
• Est. Priority Date: 02/05/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Primary Examiner(s): Weiss, Howard
• Assistant Examiner(s): Rao, Steven
• Application Number:
  US13/613,413
• Publication Number:
  US 20130001544A1
• Time in Patent Office: 551 Days
• Field of Search: 257/43, 257/59, 257/E29.101, 438/3
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 29/1033 with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with channel and gate aligned in the lengthwise direction H01L29/42376; with buried channel H01L29/7838
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a variety of applications is provided. A semiconductor device has a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a substrate, an insulating layer over the transistor, and a conductive layer over the insulating layer. The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer. In a channel width direction of the oxide semiconductor layer, end portions of the gate insulating layer and the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer covers a channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer and is in contact with the gate electrode layer.

Claims

1. A semiconductor device comprising:

a first substrate having flexibility;

a first insulating layer over the first substrate;

an oxide semiconductor layer over the first insulating layer, wherein the oxide semiconductor layer comprises a crystal region which is c-axis-aligned perpendicularly to a surface of the oxide semiconductor layer,

a second insulating layer over the oxide semiconductor layer;

wherein the second insulating layer extends in a channel width direction of the oxide semiconductor layer from a first position to a second position so as to intersect with the oxide semiconductor layer, wherein the first insulating layer and the second insulating layer are in contact with each other in the first position and in the second position.

2. The semiconductor device according to claim 1, further comprising:

a first conductive layer under the oxide semiconductor layer with the first insulating layer interposed therebetween.

3. The semiconductor device according to claim 1, further comprising:

a second conductive layer over the oxide semiconductor layer with the second insulating layer interposed therebetween.

4. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises an oxide semiconductor, the oxide semiconductor comprising indium and zinc.

5. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises an In—

Zn—

Ga—

O based oxide semiconductor.

6. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises one selected from the group consisting of an In—

Sn—

Ga—

Zn—

O-based oxide semiconductor, an In—

Sn—

Zn—

O-based oxide semiconductor, an In—

Al—

Zn—

O-based oxide semiconductor, a Sn—

Ga—

Zn—

O-based oxide semiconductor, an Al—

Ga—

Zn—

O-based oxide semiconductor, a Sn—

Al—

Zn—

O-based oxide semiconductor, an In—

Zn—

O-based oxide semiconductor, a Sn—

Zn—

O-based oxide semiconductor, an Al—

Zn—

O-based oxide semiconductor, a Zn—

Mg—

O-based oxide semiconductor, a Sn—

Mg—

O-based oxide semiconductor, an In—

Mg—

O-based oxide semiconductor, an In—

O-based oxide semiconductor, a Sn—

O-based oxide semiconductor, and a Zn—

O-based oxide.

7. The semiconductor device according to claim 1, further comprising:

a second oxide semiconductor layer on the oxide semiconductor layer.

8. The semiconductor device according to claim 1, wherein a side surface of the oxide semiconductor layer is in contact with the second insulating layer.

9. A semiconductor device comprising:

a first substrate having flexibility;

a first conductive layer over the first substrate;

a first insulating layer over the first conductive layer;

an oxide semiconductor layer over the first insulating layer, wherein the oxide semiconductor layer comprises a crystal region which is c-axis-aligned perpendicularly to a surface of the oxide semiconductor layer,

a second insulating layer over the oxide semiconductor layer;

a second conductive layer over the second insulating layer;

wherein the second insulating layer extends in a channel width direction of the oxide semiconductor layer from a first position to a second position so as to intersect with the oxide semiconductor layer, wherein the first insulating layer and the second insulating layer are in contact with each other in the first position and in the second position, and

wherein the second conductive layer extends in the channel width direction from a third position to a fourth position so as to intersect with the oxide semiconductor layer, wherein the first conductive layer and the second conductive layer are in contact with each other in the third position and in the fourth position.

10. The semiconductor device according to claim 9, wherein the oxide semiconductor layer comprises an oxide semiconductor, the oxide semiconductor comprising indium and zinc.

11. The semiconductor device according to claim 9, wherein the oxide semiconductor layer comprises an In—

Zn—

Ga—

O based oxide semiconductor.

12. The semiconductor device according to claim 9, wherein the oxide semiconductor layer comprises one selected from the group consisting of an In—

Sn—

Ga—

Zn—

O-based oxide semiconductor, an In—

Sn—

Zn—

O-based oxide semiconductor, an In—

Al—

Zn—

O-based oxide semiconductor, a Sn—

Ga—

Zn—

O-based oxide semiconductor, an Al—

Ga—

Zn—

O-based oxide semiconductor, a Sn—

Al—

Zn—

O-based oxide semiconductor, an In—

Zn—

O-based oxide semiconductor, a Sn—

Zn—

O-based oxide semiconductor, an Al—

Zn—

O-based oxide semiconductor, a Zn—

Mg—

O-based oxide semiconductor, a Sn—

Mg—

O-based oxide semiconductor, an In—

Mg—

O-based oxide semiconductor, an In—

O-based oxide semiconductor, a Sn—

O-based oxide semiconductor, and a Zn—

O-based oxide.

13. The semiconductor device according to claim 9, further comprising:

a second oxide semiconductor layer on the oxide semiconductor layer.

14. The semiconductor device according to claim 9, wherein a side surface of the oxide semiconductor layer is in contact with the second insulating layer.

15. A semiconductor device comprising:

a first substrate having flexibility;

a first conductive layer over the first substrate;

a first insulating layer over the first conductive layer;

a first oxide semiconductor layer over the first insulating layer, wherein the first oxide semiconductor layer comprises a crystal region which is c-axis-aligned perpendicularly to a surface of the first oxide semiconductor layer,

a second insulating layer over the first oxide semiconductor layer;

a third insulating layer over the first conductive layer;

a second oxide semiconductor layer over the third insulating layer, wherein the second oxide semiconductor layer comprises a crystal region which is c-axis-aligned perpendicularly to a surface of the second oxide semiconductor layer;

a fourth insulating layer over the second oxide semiconductor layer;

a second conductive layer over the second insulating layer and the fourth insulating layer;

wherein the second insulating layer extends in a channel width direction of the first oxide semiconductor layer from a first position to a second position so as to intersect with the first oxide semiconductor layer, wherein the first insulating layer and the second insulating layer are in contact with each other in the first position and in the second position,

wherein the fourth insulating layer extends in a channel width direction of the second oxide semiconductor layer from a third position to a fourth position so as to intersect with the second oxide semiconductor layer, wherein the third insulating layer and the fourth insulating layer are in contact with each other in the third position and in the fourth position,

wherein the second conductive layer extends in the channel width direction of the first oxide semiconductor layer from a fifth position to a sixth position so as to intersect with the first oxide semiconductor layer, wherein the first conductive layer and the second conductive layer are in contact with each other in the fifth position and in the sixth position, and

wherein the second conductive layer extends in the channel width direction of the second oxide semiconductor layer from the sixth position to a seventh position so as to intersect with the second oxide semiconductor layer, wherein the first conductive layer and the second conductive layer are in contact with each other in the seventh position.

16. The semiconductor device according to claim 15, wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises an oxide semiconductor, the oxide semiconductor comprising indium and zinc.

17. The semiconductor device according to claim 15, wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises an In—

Zn—

Ga—

O based oxide semiconductor.

18. The semiconductor device according to claim 15, wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises one selected from the group consisting of an In—

Sn—

Ga—

Zn—

O-based oxide semiconductor, an In—

Sn—

Zn—

O-based oxide semiconductor, an In—

Al—

Zn—

O-based oxide semiconductor, a Sn—

Ga—

Zn—

O-based oxide semiconductor, an Al—

Ga—

Zn—

O-based oxide semiconductor, a Sn—

Al—

Zn—

O-based oxide semiconductor, an In—

Zn—

O-based oxide semiconductor, a Sn—

Zn—

O-based oxide semiconductor, an Al—

Zn—

O-based oxide semiconductor, a Zn—

Mg—

O-based oxide semiconductor, a Sn—

Mg—

O-based oxide semiconductor, an In—

Mg—

O-based oxide semiconductor, an In—

O-based oxide semiconductor, a Sn—

O-based oxide semiconductor, and a Zn—

O-based oxide.

19. The semiconductor device according to claim 15, further comprising:

a third oxide semiconductor layer on the first oxide semiconductor layer.

20. The semiconductor device according to claim 15,

wherein a side surface of the first oxide semiconductor layer is in contact with the second insulating layer, and

wherein a side surface of the second oxide semiconductor layer is in contact with the fourth insulating layer.

21. A semiconductor device comprising a transistor, the transistor comprising:

a gate electrode;

a first insulating layer over the gate electrode;

an oxide semiconductor layer over the gate electrode with the first insulating layer therebetween;

a second insulating layer over the oxide semiconductor layer; and

a conductive layer over the oxide semiconductor layer with the second insulating layer therebetween, wherein the conductive layer is overlapped with the gate electrode and is electrically connected with the gate electrode,

wherein each of the gate electrode and the conductive layer extends beyond both side edges of the oxide semiconductor layer in a channel width direction of the transistor so that the oxide semiconductor layer is surrounded by the gate electrode, the first insulating layer, the second insulating layer and the conductive layer.

22. The semiconductor device according to claim 21,

wherein the gate electrode and the conductive layer are in contact with each other in both sides of the oxide semiconductor layer in the channel width direction of the transistor.

23. The semiconductor device according to claim 21, wherein the oxide semiconductor layer comprises indium, zinc, oxygen, and a metal element.

24. The semiconductor device according to claim 21, wherein the semiconductor device is a display device.

25. The semiconductor device according to claim 24, wherein the transistor is included in a driver circuit.

26. The semiconductor device according to claim 21, wherein a carrier concentration of a channel formation region of the transistor is lower than 1×

10¹¹/cm³.

27. The semiconductor device according to claim 21, further comprising:

a source electrode over and electrically connected with the oxide semiconductor layer; and

a drain electrode over and electrically connected with the oxide semiconductor layer.

28. A semiconductor device comprising a transistor, the transistor comprising:

a gate electrode;

a first insulating layer over the gate electrode;

an oxide semiconductor layer over the gate electrode with the first insulating layer therebetween;

a second insulating layer over the oxide semiconductor layer; and

a conductive layer over the oxide semiconductor layer with the second insulating layer therebetween, wherein the conductive layer is overlapped with the gate electrode and is electrically connected with the gate electrode,

wherein the second insulating layer includes a first opening and a second opening where the first opening and the second opening are arranged in a channel width direction of the transistor in such a manner that the oxide semiconductor layer are located between the first opening and the second opening, and

wherein each of the gate electrode and the conductive layer extends beyond both side edges of the oxide semiconductor layer in the channel width direction of the transistor so that portions of the conductive layer are formed in the first opening and the second opening.

29. The semiconductor device according to claim 28,

wherein the gate electrode and the conductive layer are in contact with each other in both sides of the oxide semiconductor layer in the channel width direction of the transistor.

30. The semiconductor device according to claim 28, wherein the oxide semiconductor layer comprises indium, zinc, oxygen, and a metal element.

31. The semiconductor device according to claim 28, wherein the semiconductor device is a display device.

32. The semiconductor device according to claim 31, wherein the transistor is included in a driver circuit.

33. The semiconductor device according to claim 28, wherein a carrier concentration of a channel formation region of the transistor is lower than 1×

10¹¹/cm³.

34. The semiconductor device according to claim 28, further comprising:

a source electrode over and electrically connected with the oxide semiconductor layer; and

a drain electrode over and electrically connected with the oxide semiconductor layer.

35. A semiconductor device comprising a transistor, the transistor comprising:

a substrate having flexibility;

a gate electrode over the substrate having flexibility;

a first insulating layer over the gate electrode;

an oxide semiconductor layer over the gate electrode with the first insulating layer therebetween;

a second insulating layer over the oxide semiconductor layer; and

a conductive layer over the oxide semiconductor layer with the second insulating layer therebetween, wherein the conductive layer is overlapped with the gate electrode and is electrically connected with the gate electrode,

wherein each of the gate electrode and the conductive layer extends beyond both side edges of the oxide semiconductor layer in a channel width direction of the transistor so that the oxide semiconductor layer is surrounded by the gate electrode, the first insulating layer, the second insulating layer and the conductive layer.

36. The semiconductor device according to claim 35,

wherein the gate electrode and the conductive layer are in contact with each other in both sides of the oxide semiconductor layer in the channel width direction of the transistor.

37. The semiconductor device according to claim 35, wherein the oxide semiconductor layer comprises indium, zinc, oxygen, and a metal element.

38. The semiconductor device according to claim 35, wherein the semiconductor device is a display device.

39. The semiconductor device according to claim 38, wherein the transistor is included in a driver circuit.

40. The semiconductor device according to claim 35, wherein a carrier concentration of a channel formation region of the transistor is lower than 1×

10¹¹/cm³.

41. The semiconductor device according to claim 35, further comprising:

a source electrode over and electrically connected with the oxide semiconductor layer; and

a drain electrode over and electrically connected with the oxide semiconductor layer.

42. A semiconductor device comprising a transistor, the transistor comprising:

a substrate having flexibility;

a gate electrode over the substrate having flexibility;

a first insulating layer over the gate electrode;

an oxide semiconductor layer over the gate electrode with the first insulating layer therebetween;

a second insulating layer over the oxide semiconductor layer; and

a conductive layer over the oxide semiconductor layer with the second insulating layer therebetween, wherein the conductive layer is overlapped with the gate electrode and is electrically connected with the gate electrode,

wherein the second insulating layer includes a first opening and a second opening where the first opening and the second opening are arranged in a channel width direction of the transistor in such a manner that the oxide semiconductor layer are located between the first opening and the second opening, and

wherein each of the gate electrode and the conductive layer extends beyond both side edges of the oxide semiconductor layer in the channel width direction of the transistor so that portions of the conductive layer are formed in the first opening and the second opening.

43. The semiconductor device according to claim 42,

wherein the gate electrode and the conductive layer are in contact with each other in both sides of the oxide semiconductor layer in the channel width direction of the transistor.

44. The semiconductor device according to claim 42, wherein the oxide semiconductor layer comprises indium, zinc, oxygen, and a metal element.

45. The semiconductor device according to claim 42, wherein the semiconductor device is a display device.

46. The semiconductor device according to claim 45, wherein the transistor is included in a driver circuit.

47. The semiconductor device according to claim 42, wherein a carrier concentration of a channel formation region of the transistor is lower than 1×

10¹¹/cm³.

48. The semiconductor device according to claim 42, further comprising:

a source electrode over and electrically connected with the oxide semiconductor layer; and

a drain electrode over and electrically connected with the oxide semiconductor layer.