Low harmonic RF switch in SOI
First Claim
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1. A method of fabricating a semiconductor structure, comprising:
- forming at least one trench through an insulator layer, wherein the at least one trench is adjacent a device formed in an active region on the insulator layer;
forming a mask on and contacting the device;
forming at least one cavity in a substrate under the insulator layer and extending laterally from the at least one trench to underneath the device, wherein the at least one cavity interrupts an interface between the substrate and the insulator layer directly beneath the device; and
filling the at least one trench with a dielectric material without filling the at least one cavity with the dielectric material,wherein the forming the mask is performed before the forming the at least one cavity, and the mask protects the device during the forming the at least one cavity.
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Abstract
A low harmonic radio-frequency (RF) switch in a silicon-on-insulator (SOI) substrate and methods of manufacture. A method includes forming at least one trench through an insulator layer. The at least one trench is adjacent a device formed in an active region on the insulator layer. The method also includes forming at least one cavity in a substrate under the insulator layer and extending laterally from the at least one trench to underneath the device.
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Citations
19 Claims
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1. A method of fabricating a semiconductor structure, comprising:
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forming at least one trench through an insulator layer, wherein the at least one trench is adjacent a device formed in an active region on the insulator layer; forming a mask on and contacting the device; forming at least one cavity in a substrate under the insulator layer and extending laterally from the at least one trench to underneath the device, wherein the at least one cavity interrupts an interface between the substrate and the insulator layer directly beneath the device; and filling the at least one trench with a dielectric material without filling the at least one cavity with the dielectric material, wherein the forming the mask is performed before the forming the at least one cavity, and the mask protects the device during the forming the at least one cavity. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method of fabricating a semiconductor structure, comprising:
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forming a semiconductor-on-insulator (SOI) wafer including a silicon substrate, an insulator layer on the substrate, and an active semiconductor layer on the insulator layer; forming an active field effect transistor (FET) device in the active semiconductor layer; forming at least one trench in a shallow trench isolation region and the insulator layer adjacent the active FET device; forming a mask on the active FET device and the shallow trench isolation region before the forming the at least one trench; and disrupting an interface between the substrate and the insulator layer at a location directly underneath the active FET device. - View Dependent Claims (10, 11, 12, 13)
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14. A semiconductor structure, comprising:
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a substrate; an insulator layer on the substrate; an active device formed in an active semiconductor layer on the insulator layer; at least one trench extending through a shallow trench isolation region and the insulator layer; and at least one cavity in the substrate, wherein the at least one cavity is below the insulator layer and extends laterally from the at least one trench to a location that is vertically aligned with the active device, and the at least one cavity interrupts an interface between the substrate and the insulator layer beneath the device, wherein the at least one trench is filled with dielectric material, and further comprising voids in the dielectric material in the at least one trench. - View Dependent Claims (15, 16, 17, 18, 19)
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Specification