Wafer level processing method and structure to manufacture two kinds of interconnects, gold and solder, on one wafer
First Claim
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1. A circuit component comprising:
- a wafer;
a first contact pad coupled to said wafer;
a second contact pad coupled to said wafer;
a passivation layer coupled to said wafer, wherein a first opening in said passivation layer is coupled to a first contact point of said first contact pad, and wherein a second opening in said passivation layer is coupled to a second contact point of said second contact pad, wherein said passivation layer comprises a nitride;
a metal bump coupled to said wafer, wherein said conductive interconnect is coupled to said first contact point through said first opening, wherein said metal bump comprises a titanium-containing layer coupled to said wafer, wherein said titanium-containing layer is coupled to said first contact point through said first opening, and a gold bump coupled to said titanium-containing layer, wherein said gold bump is coupled to said first contact point through said first opening, wherein said gold bump comprises a gold seed layer and an electroplated gold layer coupled to said gold seed layer without any conductive layer between said gold seed layer and said electroplated gold layer, wherein said gold bump has a height between 1 and 60 micrometers; and
a solder wettable layer coupled to said wafer, wherein said solder wettable layer is coupled to said second contact point through said second opening, wherein said solder wettable layer comprises a gold-containing layer coupled to said wafer, wherein said gold-containing layer of said solder wettable layer is coupled to said second contact point through said second opening, wherein said gold-containing layer of said solder wettable layer has a thickness between 500 and 10,000 Angstroms.
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Abstract
A chip structure comprising a substrate, a plurality of wire bonding pads and a plurality of solder pads is provided. Gold bumps or gold pads can be formed on the wire bonding pads while solder bumps can be formed on the solder pads concurrently. Alternatively, both wire bonding pads and solder pads can be formed of the same metal stack.
45 Citations
42 Claims
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1. A circuit component comprising:
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a wafer; a first contact pad coupled to said wafer; a second contact pad coupled to said wafer; a passivation layer coupled to said wafer, wherein a first opening in said passivation layer is coupled to a first contact point of said first contact pad, and wherein a second opening in said passivation layer is coupled to a second contact point of said second contact pad, wherein said passivation layer comprises a nitride; a metal bump coupled to said wafer, wherein said conductive interconnect is coupled to said first contact point through said first opening, wherein said metal bump comprises a titanium-containing layer coupled to said wafer, wherein said titanium-containing layer is coupled to said first contact point through said first opening, and a gold bump coupled to said titanium-containing layer, wherein said gold bump is coupled to said first contact point through said first opening, wherein said gold bump comprises a gold seed layer and an electroplated gold layer coupled to said gold seed layer without any conductive layer between said gold seed layer and said electroplated gold layer, wherein said gold bump has a height between 1 and 60 micrometers; and a solder wettable layer coupled to said wafer, wherein said solder wettable layer is coupled to said second contact point through said second opening, wherein said solder wettable layer comprises a gold-containing layer coupled to said wafer, wherein said gold-containing layer of said solder wettable layer is coupled to said second contact point through said second opening, wherein said gold-containing layer of said solder wettable layer has a thickness between 500 and 10,000 Angstroms. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A circuit component comprising:
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a wafer; a first contact pad coupled to said wafer; a second contact pad coupled to said wafer; a passivation layer coupled to said wafer, wherein a first opening in said passivation layer is coupled to a first contact point of said first contact pad, and wherein a second opening in said passivation layer is coupled to a second contact point of said second contact pad, wherein said passivation layer comprises a nitride; a gold bump comprising a gold seed layer physically coupled to said first contact point through said first opening, wherein said gold bump has a height thickness between 1 and 60 micrometers; a copper seed layer directly physically coupled to said second contact point through said second opening; an electroplated copper layer directly physically coupled on said copper seed layer; and a solder wettable layer coupled to said electroplated copper layer, wherein said solder wettable layer comprises a gold-containing layer directly physically coupled to said electroplated copper layer, wherein said gold-containing layer has a thickness between 500 and 10,000 Angstroms and less than said thickness of said gold interconnect. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. A circuit component comprising:
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a wafer; a first contact pad coupled to said wafer; a second contact pad coupled to said wafer; a passivation layer coupled to said wafer, wherein a first opening in said passivation layer is coupled to a first contact point of said first contact pad, and wherein a second opening in said passivation layer is coupled to a second contact point of said second contact pad, wherein said passivation layer comprises a nitride; a tape-automated-bonding (TAB) bump physically coupled to said first contact point through said first opening, wherein said tape-automated-bonding (TAB) bump comprises a first titanium-containing layer directly physically coupled to said first contact point through said first opening, and a gold interconnect coupled to said titanium-containing layer, wherein said gold bump comprises a gold seed layer and an electroplated gold layer directly physically coupled to said gold seed layer, wherein said gold bump has a height between 1 and 60 micrometers; and a solder bonding pad directly physically coupled to said second contact point through said second opening, wherein said solder bonding pad comprises a gold-containing layer coupled to said wafer, wherein said gold-containing layer of said solder bonding pad is coupled to said second contact point through said second opening, wherein said gold-containing layer of said solder bonding pad has a thickness between 500 and 10,000 Angstroms. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31)
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32. A circuit component comprising:
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a wafer; a first contact pad coupled to said wafer; a second contact pad coupled to said wafer; a passivation layer coupled to said wafer, wherein a first opening in said passivation layer is coupled to a first contact point of said first contact pad, and wherein a second opening in said passivation layer is coupled to a second contact point of said second contact pad, wherein said passivation layer comprises a nitride; a tape-automated-bonding (TAB) bump directly physically coupled to said first contact point through said first opening, wherein said tape-automated-bonding (TAB) bump comprises a gold bump having a height between 1 and 60 micrometers; and a solder bonding pad comprising an electroplated copper layer directly physically coupled to said second contact point through said second opening, and a gold-containing layer directly physically coupled to said electroplated copper layer, wherein said gold-containing layer has a thickness between 500 and 10,000 Angstroms. - View Dependent Claims (33, 34, 35, 36, 37, 38, 39, 40, 41, 42)
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Specification