Wafer level processing method and structure to manufacture two kinds of interconnects, gold and solder, on one wafer

• US 8,674,507 B2
• Filed: 05/27/2004
• Issued: 03/18/2014
• Est. Priority Date: 05/27/2003
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Megit Acquisition Corp.
• Inventors: Chou, Chien-Kang, Chou, Chiu-Ming, Lin, Chu-Fu, Lin, Li-Ren
• Primary Examiner(s): MATTHEWS, COLLEEN ANN
• Application Number:
  US10/855,086
• Publication Number:
  US 20050017355A1
• Time in Patent Office: 3,582 Days
• Field of Search: 257/737, 257/738, 257/741, 257/772, 257/734, 257/748, 257/750, 257/E21.508, 257/E23.02, 257/E23.021
• US Class Current: 257/748
• CPC Class Codes: H01L 2224/0231 Manufacturing methods of the redistribution layers
• CPC Class Codes: H01L 2224/0347 using a lift-off mask
• CPC Class Codes: H01L 2224/03912 the bump being used as a mask for patterning the bonding area
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/04073 Bonding areas specifically adapted for connectors of different types
• CPC Class Codes: H01L 2224/05073 Single internal layer
• CPC Class Codes: H01L 2224/05082 Two-layer arrangements
• CPC Class Codes: H01L 2224/05083 Three-layer arrangements
• CPC Class Codes: H01L 2224/05147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/11462 Electroplating
• CPC Class Codes: H01L 2224/1147 using a lift-off mask
• CPC Class Codes: H01L 2224/11849 Reflowing
• CPC Class Codes: H01L 2224/11912 the bump being used as a mask for patterning other parts
• CPC Class Codes: H01L 2224/1308 being stacked
• CPC Class Codes: H01L 2224/13082 : Two-layer arrangements
• CPC Class Codes: H01L 2224/13099 : Material
• CPC Class Codes: H01L 2224/131 : with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/13111 : Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/13139 : Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/13144 : Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/13147 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/16145 : the bodies being stacked
• CPC Class Codes: H01L 2224/45099 : Material
• CPC Class Codes: H01L 2224/48091 : Arched
• CPC Class Codes: H01L 2224/48453 : of the interface with the bonding area
• CPC Class Codes: H01L 2224/48463 : the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 2224/731 : Location prior to the connecting process
• CPC Class Codes: H01L 2224/73207 : Bump and wire connectors
• CPC Class Codes: H01L 2224/81411 : Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/85444 : Gold (Au) as principal constituent
• CPC Class Codes: H01L 2225/0651 : Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06513 : Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 24/03 : Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00013 : Fully indexed content
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01011 : Sodium [Na]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01016 : Sulfur [S]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01073 : Tantalum [Ta]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/04953 : TaN
• CPC Class Codes: H01L 2924/05042 : Si3N4
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/14 : Integrated circuits

Abstract

A chip structure comprising a substrate, a plurality of wire bonding pads and a plurality of solder pads is provided. Gold bumps or gold pads can be formed on the wire bonding pads while solder bumps can be formed on the solder pads concurrently. Alternatively, both wire bonding pads and solder pads can be formed of the same metal stack.

Claims

1. A circuit component comprising:

a wafer;

a first contact pad coupled to said wafer;

a second contact pad coupled to said wafer;

a passivation layer coupled to said wafer, wherein a first opening in said passivation layer is coupled to a first contact point of said first contact pad, and wherein a second opening in said passivation layer is coupled to a second contact point of said second contact pad, wherein said passivation layer comprises a nitride;

a metal bump coupled to said wafer, wherein said conductive interconnect is coupled to said first contact point through said first opening, wherein said metal bump comprises a titanium-containing layer coupled to said wafer, wherein said titanium-containing layer is coupled to said first contact point through said first opening, and a gold bump coupled to said titanium-containing layer, wherein said gold bump is coupled to said first contact point through said first opening, wherein said gold bump comprises a gold seed layer and an electroplated gold layer coupled to said gold seed layer without any conductive layer between said gold seed layer and said electroplated gold layer, wherein said gold bump has a height between 1 and 60 micrometers; and

a solder wettable layer coupled to said wafer, wherein said solder wettable layer is coupled to said second contact point through said second opening, wherein said solder wettable layer comprises a gold-containing layer coupled to said wafer, wherein said gold-containing layer of said solder wettable layer is coupled to said second contact point through said second opening, wherein said gold-containing layer of said solder wettable layer has a thickness between 500 and 10,000 Angstroms.

2. The circuit component of claim 1, further comprising an electroplated copper layer coupled to said wafer, wherein said electroplated copper layer is coupled to said second contact point through said second opening, wherein said gold-containing layer of said solder wettable layer is further coupled to said electroplated copper layer, and said gold-containing layer of said solder wettable layer is coupled to said electroplated copper layer.

3. The circuit component of claim 1, wherein said gold bump is used to be wirebonded thereto.

4. The circuit component of claim 1, wherein said gold bump is used to be tape-automated bonded (TAB) thereto.

5. The circuit component of claim 1, wherein said gold seed layer of said gold bump comprises sputtered gold.

6. The circuit component of claim 1, wherein said titanium-containing layer comprises a titanium-tungsten alloy.

7. The circuit component of claim 1, wherein said titanium-containing layer comprises a-titanium nitride.

8. The circuit component of claim 1, wherein said gold bump, said gold seed layer and said titanium-containing layer are further coupled to said first contact point.

9. The circuit component of claim 1, wherein said gold-containing layer of said solder wettable layer is further coupled to said second contact point.

10. A circuit component comprising:

a wafer;

a first contact pad coupled to said wafer;

a second contact pad coupled to said wafer;

a passivation layer coupled to said wafer, wherein a first opening in said passivation layer is coupled to a first contact point of said first contact pad, and wherein a second opening in said passivation layer is coupled to a second contact point of said second contact pad, wherein said passivation layer comprises a nitride;

a gold bump comprising a gold seed layer physically coupled to said first contact point through said first opening, wherein said gold bump has a height thickness between 1 and 60 micrometers;

a copper seed layer directly physically coupled to said second contact point through said second opening;

an electroplated copper layer directly physically coupled on said copper seed layer; and

a solder wettable layer coupled to said electroplated copper layer, wherein said solder wettable layer comprises a gold-containing layer directly physically coupled to said electroplated copper layer, wherein said gold-containing layer has a thickness between 500 and 10,000 Angstroms and less than said thickness of said gold interconnect.

11. The circuit component of claim 10 further comprising a titanium-containing layer coupled to said wafer, wherein said titanium-containing layer is coupled to said second contact point through said second opening, wherein said copper seed layer, said electroplated copper layer and said solder wettable layer are further coupled to said titanium-containing layer.

12. The circuit component of claim 10, wherein said gold bump is used to be wirebonded thereto.

13. The circuit component of claim 10, wherein said gold bump is used to be ape-automated bonded (TAB) thereto.

14. The circuit component of claim 10, wherein said gold bump comprises sputtered gold.

15. The circuit component of claim 10, wherein said gold bump comprises electroplated gold.

16. The circuit component of claim 10 further comprising a titanium-tungsten-alloy layer coupled to said wafer, wherein said titanium-tungsten-alloy layer is coupled to said second contact point through said second opening, wherein said copper seed layer, said electroplated copper layer and said solder wettable layer are further coupled to said titanium-tungsten-alloy layer.

17. The circuit component of claim 10 further comprising a titanium-containing layer coupled to said wafer, wherein said titanium-containing layer is coupled to said first contact point through said first opening, wherein said gold interconnect is further coupled to said titanium-containing layer and is coupled to said titanium-containing layer.

18. The circuit component of claim 10, wherein said gold bump is further coupled to said first contact point.

19. The circuit component of claim 10, wherein said copper seed layer, said electroplated copper layer and said gold-containing layer of said solder wettable layer are further coupled to said second contact point.

20. A circuit component comprising:

a wafer;

a first contact pad coupled to said wafer;

a second contact pad coupled to said wafer;

a passivation layer coupled to said wafer, wherein a first opening in said passivation layer is coupled to a first contact point of said first contact pad, and wherein a second opening in said passivation layer is coupled to a second contact point of said second contact pad, wherein said passivation layer comprises a nitride;

a tape-automated-bonding (TAB) bump physically coupled to said first contact point through said first opening, wherein said tape-automated-bonding (TAB) bump comprises a first titanium-containing layer directly physically coupled to said first contact point through said first opening, and a gold interconnect coupled to said titanium-containing layer, wherein said gold bump comprises a gold seed layer and an electroplated gold layer directly physically coupled to said gold seed layer, wherein said gold bump has a height between 1 and 60 micrometers; and

a solder bonding pad directly physically coupled to said second contact point through said second opening, wherein said solder bonding pad comprises a gold-containing layer coupled to said wafer, wherein said gold-containing layer of said solder bonding pad is coupled to said second contact point through said second opening, wherein said gold-containing layer of said solder bonding pad has a thickness between 500 and 10,000 Angstroms.

21. The circuit component of claim 20, wherein said first titanium-containing layer comprises a titanium-tungsten alloy.

22. The circuit component of claim 20, wherein said first titanium-containing layer comprises a-titanium nitride.

23. The circuit component of claim 20, wherein said gold seed layer of said gold bump comprises sputtered gold.

24. The circuit component of claim 20, wherein said solder bonding pad further comprises an electroplated copper layer coupled to said wafer, wherein said electroplated copper layer is coupled to said second contact point through said second opening, wherein said gold-containing layer of said solder bonding pad is further coupled to said electroplated copper layer and is coupled to said electroplated copper layer.

25. The circuit component of claim 24, wherein said solder bonding pad further comprises a second titanium-containing layer coupled to said wafer, wherein said second titanium-containing layer is coupled to said second contact point through said second opening, wherein said electroplated copper layer and said gold-containing layer of said solder bonding pad are further coupled to said second titanium-containing layer and are coupled to said second titanium-containing laver.

26. The circuit component of claim 24, wherein said solder bonding pad further comprises a titanium-tungsten-alloy layer coupled to said wafer, wherein said titanium-tungsten-alloy layer is coupled to said second contact point through said second opening, wherein said electroplated copper layer and said gold-containing layer of said solder bonding pad are further coupled to said titanium-tungsten-alloy layer and are coupled to said titanium-tungsten-alloy-layer.

27. The circuit component of claim 20, wherein said solder bonding pad further comprises a copper/nickel layer coupled to said wafer, wherein said copper/nickel layer is coupled to said second contact point through said second opening, wherein said gold-containing layer of said solder bonding pad is further coupled to said copper/nickel layer and is coupled to said copper/nickel layer.

28. The circuit component of claim 27, wherein said solder bonding pad further comprises a second titanium-containing layer coupled to said wafer, wherein said second titanium-containing layer is coupled to said second contact point through said second opening, wherein said copper/nickel layer and said gold-containing layer of said solder bonding pad are further coupled to said second titanium-containing layer and are coupled to said second titanium-containing layer.

29. The circuit component of claim 28, wherein said second titanium-containing layer comprises a titanium-tungsten alloy.

30. The circuit component of claim 20, wherein said tape-automated-bonding (TAB) bump is further coupled to said first contact point.

31. The circuit component of claim 20, wherein said solder bonding pad is further coupled to said second contact point.

32. A circuit component comprising:

a wafer;

a first contact pad coupled to said wafer;

a second contact pad coupled to said wafer;

a passivation layer coupled to said wafer, wherein a first opening in said passivation layer is coupled to a first contact point of said first contact pad, and wherein a second opening in said passivation layer is coupled to a second contact point of said second contact pad, wherein said passivation layer comprises a nitride;

a tape-automated-bonding (TAB) bump directly physically coupled to said first contact point through said first opening, wherein said tape-automated-bonding (TAB) bump comprises a gold bump having a height between 1 and 60 micrometers; and

a solder bonding pad comprising an electroplated copper layer directly physically coupled to said second contact point through said second opening, and a gold-containing layer directly physically coupled to said electroplated copper layer, wherein said gold-containing layer has a thickness between 500 and 10,000 Angstroms.

33. The circuit component of claim 32, wherein said tape-automated-bonding (TAB) bump further comprises a titanium-containing layer coupled to said wafer, wherein said titanium-containing layer is coupled to said first contact point through said first opening, wherein said gold bump is further coupled to said titanium-containing layer and is coupled to said titanium-containing layer.

34. The circuit component of claim 32, wherein said tape-automated-bonding (TAB) bump further comprises a titanium-tungsten-alloy layer coupled to said wafer, wherein said titanium-tungsten-alloy layer is coupled to said first contact point through said first opening, wherein said gold bump is further coupled to said titanium-tungsten-alloy layer and is coupled to said titanium-tungsten-alloy layer.

35. The circuit component of claim 32, wherein said gold bump comprises sputtered gold.

36. The circuit component of claim 32, wherein said gold bump comprises electroplated gold.

37. The circuit component of claim 32, wherein said solder bonding pad further comprises a titanium-containing layer coupled to said wafer, wherein said titanium-containing layer is coupled to said second contact point through said second opening, wherein said gold-containing layer and said electroplated copper layer are further coupled to said titanium-containing layer and are coupled to said titanium-containing layer.

38. The circuit component of claim 32, wherein said solder bonding pad further comprises a titanium-tungsten-alloy layer coupled to said wafer, wherein said titanium-tungsten-alloy layer is coupled to said second contact point through said second opening, wherein said gold-containing layer and said electroplated copper layer are further coupled to said titanium-tungsten-alloy layer and are coupled to said titanium-tungsten-alloy layer.

39. The circuit component of claim 32, wherein said solder bonding pad further comprises a copper seed layer coupled to said wafer, wherein said copper seed layer is coupled to said second contact point through said second opening, wherein said electroplated copper layer is further directly on said copper seed layer and is coupled to said copper seed layer.

40. The circuit component of claim 32, wherein said solder bonding pad is further coupled to said second contact point.

41. The circuit component of claim 32, wherein said tape-automated-bonding (TAB) bump is further coupled to said first contact point.

42. The circuit component of claim 32, wherein said second contact pad is made of copper.