Digital charge amplifier and method for converting charge signals into digital signals

• US 8,674,761 B2
• Filed: 11/18/2010
• Issued: 03/18/2014
• Est. Priority Date: 11/25/2009
• Status: Active Grant

• Current Assignee: Kistler Holding AG
• Original Assignee: Kistler Holding AG
• Inventors: Amstutz, Leo, Neff, Kurt, Otter, Daniel
• Primary Examiner(s): Mottola, Steven J
• Application Number:
  US13/511,713
• Publication Number:
  US 20120268202A1
• Time in Patent Office: 1,216 Days
• Field of Search: 330/174, 330/59, 330/69, 330/86
• US Class Current: 330/174
• CPC Class Codes: G01L 1/16 using properties of piezoelectric devices
• CPC Class Codes: G01L 9/08 by making use of piezoelectric devices , i.e. electric circuits therefor
• CPC Class Codes: H03F 1/304 and using digital means
• CPC Class Codes: H03F 3/70 Charge amplifiers

Abstract

A circuit for a charge amplifier for converting piezoelectric measurement signals continuously sets the output signal of the amplifier to a value close to zero, such that a reset switch becomes unnecessary. The amplifier includes a pulse generator that provides the output signal of the amplifier in the form of pulses, which are easy to transmit with low interference. The pulse frequency is proportional to the rate of change of charge. The pulses, which are added in a counter, represent a value proportional to the change in the charge since the last counter reset, which is proportional to the present measured value at the measurement element.

Claims

1. Charge amplifier circuit for converting positive and negative charge signals Q that are output by a piezoelectric measuring element into a digital signal D that is proportional to the present measured value at the measuring element, comprising a charge amplifier V1 having a charge input and a voltage output for converting the detected charge Q into a voltage U2, wherein a compensation circuit K comprising two outputs is connected downstream of the voltage output of the charge amplifier V1, wherein the first output is connected to the charge input of the charge amplifier V1 and the second output to a counter Z having two inputs Z+, Z−

, and wherein on the one hand, the compensation circuit K can produce a compensation charge Qk+ or Qk−

respectively, that is proportional to the voltage U2 and that can be sent to the charge input of the charge amplifier V1 by means of the first output in order to compensate the input signal Q, and wherein on the other hand the compensation circuit can produce a number of pulses P+, P−

that is proportional to the magnitude of each compensation charge Qk+ or Qk−

produced, and said pulses can be sent to an input Z−

, Z+ of the counter Z opposite the sign of the particular compensation charge Qk+ or Qk−

by means of the second output, wherein the desired digital signal D, which is proportional to the sum of the charge quanta input beforehand, is available at the output of the counter Z.

2. The circuit according to claim 1, wherein the compensation circuit K comprises a pulse generator G for generating incremental pulses P, the number of which is proportional to the changes in charge at the amplifier input.

10. The circuit according to claim 1, wherein the counter comprises a reset switch R for resetting the counter to zero and/or a start switch S for starting the counting process.

11. The circuit according to claim 1, further comprising means to enable the counter pulses to be transmitted unmodulated or modulated onto a carrier, galvanically or by inductive or capacitive or optical couplers or transmitter and receiver antennas, to the counter.

12. The circuit according to claim 1, wherein the digital signal D is a voltage signal.

3. A charge amplifier circuit for converting positive and negative charge signals Q that are output by a piezoelectric measuring element into a digital signal D that is proportional to the present measured value at the measuring element, comprising a charge amplifier V1 having a charge input and a voltage output for converting the detected charge Q into a voltage U2, wherein a compensation circuit K comprising two outputs is connected downstream of the voltage output of the charge amplifier V1, wherein the first output is connected to the charge input of the charge amplifier V1 and the second output to a counter Z having two inputs Z+, Z−

, and wherein on the one hand, the compensation circuit K can produce a compensation charge Qk+ or Qk−

respectively, that is proportional to the voltage U2 and that can be sent to the charge input of the charge amplifier V1 by means of the first output in order to compensate the input signal Q, and wherein on the other hand the compensation circuit can produce a number of pulses P+, P−

that is proportional to the magnitude of each compensation charge Qk+ or Qk−

produced, and said pulses can be sent to an input Z−

, Z+ of the counter Z opposite the sign of the particular compensation charge Qk+ or Qk−

by means of the second output, wherein the desired digital signal D, which is proportional to the sum of the charge quanta input beforehand, is available at the output of the counter Z,

wherein the compensation circuit K comprises a pulse generator G for generating incremental pulses P, the number of which is proportional to the changes in charge at the amplifier input, and

wherein two AND gates &

1, &

2 are connected in parallel downstream of the pulse generator G, said gates also being connected at the input side in parallel with the output of the charge amplifier V1 and each being connected at the output side to the input Z−

or Z+ of the counter respectively, wherein depending on the sign of U2, the pulses pass through the gate &

1 or &

2 and can be detected in the counter Z at Z−

or Z+.

4. The circuit according to claim 3, wherein two compensation amplifiers V2, V3, which are connected in parallel between the output of the charge amplifier V1 and the AND gates &

1 or &

2 respectively.

5. The circuit according to claim 4, wherein two current sources Ik+, Ik−

for generating the compensation charges Qk+ and Qk−

.

6. The circuit according to claim 5, wherein two switches S1, S2 each downstream of one output of the current sources Ik+, Ik−

, which are also each connected at the input side to one of the outputs of the AND gates &

1, &

2, wherein the switches S1, S2 can send current from the current sources Ik+, Ik−

to the charge input of the charge amplifier V1 during a pulse duration.

7. The circuit according to claim 6, wherein diodes DI, D2, which are connected downstream to one each of the switches S1, S2 in series.

8. The circuit according to claim 5, wherein two switches S1, S2 downstream of one output each of the current sources Ik+, Ik−

, which at the input side are also each connected to one of the outputs of the compensation amplifier V2 and V3, to allow a current to pass from the current source Ik+ in the case of a positive output voltage of the compensation amplifier V2, or from the current source Ik−

in the case of a negative output voltage of the compensation amplifier V3.

9. The circuit according to claim 8, wherein transistors or mechanical switches are used as switches, at least in part.

13. Method for converting positive and negative charge signals Q that are output by a piezoelectric measuring element into a digital signal D that is proportional to the present measured value at the measuring element, comprising the steps that:

a charge amplifier V1 converts the input charge signal Q into an analogue voltage signal U2, the voltage signal U2 is passed into a compensation circuit K downstream of the charge amplifier V1, on the one hand the compensation circuit K produces a compensation charge Qk+ or Qk−

respectively that is proportional to the voltage U2 and, to compensate the input signal Q, sends it to the charge input of the charge amplifier V1 by means of a first output, and that on the other hand the compensation circuit K produces a number of pulses P+, P−

that is proportional to the magnitude of each compensation charge Qk+ or Qk−

produced and sends them to an input Z−

, Z+ of the counter Z opposite the sign of the particular compensation charge Qk+ or Qk−

by means of the second output, and said counter sums the pulses and delivers the respective sum as the desired digital signal D.