Driver circuit, display device including the driver circuit, and electronic device including the display device

• US 8,674,979 B2
• Filed: 10/26/2010
• Issued: 03/18/2014
• Est. Priority Date: 10/30/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Hayakawa, Masahiko
• Primary Examiner(s): Kumar, Srilakshmi K
• Assistant Examiner(s): Treitler, Damon
• Application Number:
  US12/912,059
• Publication Number:
  US 20110102409A1
• Time in Patent Office: 1,239 Days
• Field of Search: 345/156, 345173-184, 178 1804- 2001
• US Class Current: 345/214
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/043 Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/0289 Details of voltage level shifters arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/0291 Details of output amplifiers or buffers arranged for use in a driving circuit
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/3674 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO

Abstract

One object is, when a thin film transistor whose channel is formed using an amorphous semiconductor is used for a driver circuit formed using only n-channel transistors or p-channel transistors, to provide a driver circuit in which the threshold voltage is compensated in accordance with the degree of change in the threshold voltage. In the driver circuit which includes a unipolar transistor including a first gate and a second gate which are disposed above and below a semiconductor layer with insulating layers provided therebetween, a first signal for controlling switching of the transistor is inputted to the first gate, a second signal for controlling a threshold voltage of the transistor is inputted to the second gate, and the second signal is controlled in accordance with a value of current consumption including a current which flows between a source and a drain of the transistor.

Claims

1. A circuit comprising:

an operation circuit comprising a first transistor and a second transistor;

a current detection circuit operationally connected to the operation circuit, the current detection circuit configured to detect a current value of current flowing in at least one of the first transistor and the second transistor;

a judgment circuit operationally connected to the current detection circuit, the judgment circuit configured to compare the current value with a reference value;

a memory circuit operationally connected to the judgment circuit; and

a voltage output circuit operationally connected to the judgment circuit through the memory circuit,

wherein each of the first transistor and the second transistor comprises;

a first gate;

a first insulating layer over the first gate;

a semiconductor layer over the first insulating layer;

a second insulating layer over the semiconductor layer; and

a second gate over the second insulating layer,

wherein a first signal configured to control switching of at least the one of the first transistor and the second transistor is inputted to the first gate of at least the one of the first transistor and the second transistor,

wherein a second signal configured to control a threshold voltage of the first transistor and a threshold voltage of the second transistor is inputted to the second gate of the first transistor and the second gate of the second transistor,

wherein the memory circuit is configured to store a third signal when the current value is larger than the reference value,

wherein the voltage output circuit is configured to output the third signal to the second gate of the first transistor and the second gate of the second transistor,

wherein a voltage of the third signal is smaller than a voltage of the second signal by a constant value, and

wherein the first transistor and the second transistor have a same conductivity type.

2. The circuit according to claim 1,

wherein the first transistor and the second transistor are n-channel transistors.

3. The circuit according to claim 1,

wherein the first transistor and the second transistor are p-channel transistors.

4. The circuit according to claim 1,

wherein the semiconductor layer comprises an oxide semiconductor.

5. A display device comprising the circuit according to claim 1.

6. An electronic device comprising the display device according to claim 5.

7. A method for operating a circuit comprising a first transistor and a second transistor each comprising a first gate and a second gate, said method comprising:

inputting a first signal configured to control switching of at least one of the first transistor and the second transistor in an operation circuit to the first gate of at least the one of the first transistor and the second transistor;

inputting a second signal for controlling configured to control a threshold voltage of the first transistor and a threshold voltage of the second transistor to the second gate of the first transistor and the second gate of the second transistor;

performing a first detection of a first current value of current flowing in the one of the first transistor and the second transistor by inputting the first signal and the second signal;

comparing the first current value with a reference value;

inputting a third signal to the second gate of the first transistor and the second gate of the second transistor when the first current value is larger than the reference value; and

performing a second detection of a second current value of current flowing in the one of the first transistor and the second transistor by inputting the first signal and the third signal,

wherein a voltage of the third signal is smaller than a voltage of the second signal by a constant value so that the second current value is smaller than the first current value, and

wherein the first transistor and the second transistor have a same conductivity type.

8. The method for operating the circuit according to claim 7,

wherein the first transistor and the second transistor are n-channel transistors.

9. The method for operating the circuit according to claim 7,

wherein the first transistor and the second transistor are p-channel transistors.

10. The method for operating the circuit according to claim 7,

wherein the third signal is supplied from a back-gate voltage control circuit to the operation circuit,

wherein the back-gate voltage control circuit comprises:

a current detection circuit performing the first detection and the second detection;

a judgment circuit performing the comparing process;

a memory circuit configured to store the third signal; and

a voltage output circuit inputting the third signal to the operation circuit.

11. The method for operating the circuit according to claim 7,

wherein a semiconductor layer of the first transistor and the second transistor each comprise an oxide semiconductor.

12. The method for operating the circuit according to claim 7,

wherein a display device comprises the circuit.

13. The method for operating the circuit according to claim 12,

wherein an electronic device comprises the display device.

14. The method for operating the circuit according to claim 7, further comprising:

comparing the second current value with the reference value; and

inputting a fourth signal to the second gate of the first transistor and the second gate of the second transistor when the second current value is larger than the reference value,

wherein the third signal is kept inputting to the second gate of the first transistor and the second gate of the second transistor when the second current value is smaller than the reference value.

15. A method for controlling a threshold voltage of a first transistor and a threshold voltage of a second transistor, each of the first transistor and the second transistor being provided in an operation circuit and comprising a first gate and a second gate, said method comprising:

inputting a power supply voltage to the operation circuit;

inputting a first signal to the second gate of the first transistor and the second gate of the second transistor;

performing a first detection of a first current value of current flowing in the operation circuit after inputting the power supply voltage and the first signal; and

comparing the first current value with a reference value;

inputting a second signal to the second gate of the first transistor and the second gate of the second transistor when the first current value is larger than the reference value; and

performing a second detection of a second current value of current flowing in the operation circuit after inputting the power supply voltage and the second signal,

wherein a voltage of the second signal is smaller than a voltage of the first signal by a constant value so that the second current value is smaller than the first current value, and

wherein the first transistor and the second transistor have a same conductivity type.

16. The method for controlling a threshold voltage of the first transistor and a threshold voltage of the second transistor according to claim 15,

wherein the first transistor and the second transistor are n-channel transistors.

17. The method for controlling a threshold voltage of the first transistor and a threshold voltage of the second transistor according to claim 15,

wherein the first transistor and the second transistor are p-channel transistors.

18. The method for controlling a threshold voltage of the first transistor and a threshold voltage of the second transistor according to claim 15,

wherein the second signal is supplied from a back-gate voltage control circuit to the operation circuit,

wherein the back-gate voltage control circuit comprises:

a current detection circuit performing the first detection and the second detection;

a judgment circuit performing the comparing process;

a memory circuit configured to store the second signal; and

a voltage output circuit inputting the second signal to the operation circuit.

19. The method for controlling a threshold voltage of the first transistor and a threshold voltage of the second transistor according to claim 15,

wherein a semiconductor layer of the first transistor and the second transistor each comprise an oxide semiconductor.

20. The method for controlling a threshold voltage of the first transistor and a threshold voltage of the second transistor according to claim 15,

wherein a display device comprises the operation circuit.

21. The method for controlling a threshold voltage of the first transistor and a threshold voltage of the second transistor according to claim 20,

wherein an electronic device comprises the display device.

22. The method for controlling a threshold voltage of the first transistor and a threshold voltage of the second transistor according to claim 15, further comprising:

comparing the second current value with the reference value; and

inputting a third signal to the second gate of the first transistor and the second gate of the second transistor when the second current value is larger than the reference value,

wherein the second signal is kept inputting to the second gate of the first transistor and the second gate of the second transistor when the second current value is smaller than the reference value.