Memory management schemes for non-volatile memory devices

• US 8,677,054 B1
• Filed: 12/09/2010
• Issued: 03/18/2014
• Est. Priority Date: 12/16/2009
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Meir, Avraham, Golov, Oren
• Primary Examiner(s): Bragdon, Reginald
• Assistant Examiner(s): Namazi, Mehdi
• Application Number:
  US12/963,649
• Time in Patent Office: 1,195 Days
• Field of Search: 711/103
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0631 by allocating resources to storage systems
• CPC Class Codes: G06F 3/0643 Management of files
• CPC Class Codes: G06F 3/065 Replication mechanisms
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

A method includes storing data in a non-volatile memory that includes multiple memory blocks. At least first and second regions are defined in the non-volatile memory. A definition is made of a first over-provisioning ratio between a first logical address space and a first physical memory space of the first region, and a second over-provisioning ratio, different from the first over-provisioning ratio, between a second logical address space and a second physical memory space of the second region. Portions of the data are compacted, individually within each of the first and second regions and independently of the other region, by copying the portions from one or more source memory blocks to one or more destination memory blocks using the first and second over-provisioning ratios, respectively.

Claims

1. A method, comprising:

storing data in a non-volatile memory that includes multiple memory blocks;

defining at least first and second regions in the non-volatile memory;

defining a first over-provisioning ratio between a first logical address space and a first physical memory space of the first region, and defining a second over-provisioning ratio, different from the first over-provisioning ratio, between a second logical address space and a second physical memory space of the second region;

individually within each of the first and second regions and independently of the other region, compacting portions of the data by copying the portions from one or more source memory blocks to one or more destination memory blocks using the first and second over-provisioning ratios, respectively.

2. The method according to claim 1, wherein defining the first and second regions comprises assigning the first region for storing parts of the data that change at a first frequency, and assigning the second region for storing portions of the data that change at a second frequency, smaller than the first frequency.

3. The method according to claim 2, and comprising setting the first over-provisioning ratio to be larger than the second over-provisioning ratio.

4. The method according to claim 2, wherein defining the first and second regions comprises assigning the first region for storing frequently-changing data, and assigning the second region for storing rarely-changing data.

5. The method according to claim 2, wherein the first region is used for storing a computer file that is known to change frequently.

6. The method according to claim 5, wherein defining the first region comprises detecting storage locations of the non-volatile memory in which the computer file is stored.

7. The method according to claim 1, wherein defining the first and second regions comprises assigning the first region for storing parts of the data that are written sequentially, and assigning the second region for storing portions of the data that are written non-sequentially.

8. The method according to claim 1, and comprising modifying at least one of the first and second over-provisioning ratios over time.

9. The method according to claim 1, wherein compacting the portions of the data comprises choosing the source memory blocks based on a selection criterion that equalizes wear of the non-volatile memory.

10. The method according to claim 1, wherein storing the data comprises accepting commands to store the data in logical addresses, translating the logical addresses into respective physical storage locations in the non-volatile memory and storing the data in the physical storage locations, and comprising modifying translation of the logical addresses into the physical storage locations based on a criterion that equalizes wear of the non-volatile memory.

11. Apparatus, comprising:

an interface, which is configured to accept data for storage in a non-volatile memory; and

a processor, which is configured to define at least first and second regions in the non-volatile memory, to define a first over-provisioning ratio between a first logical address space and a first physical memory space of the first region, to define a second over-provisioning ratio, different from the first over-provisioning ratio, between a second logical address space and a second physical memory space of the second region, and, individually within each of the first and second regions and independently of the other region, to compact portions of the data by copying the portions from one or more source memory blocks to one or more destination memory blocks using the first and second over-provisioning ratios, respectively.

12. The apparatus according to claim 11, wherein the processor is configured to assign the first region for storing parts of the data that change at a first frequency, and to assign the second region for storing portions of the data that change at a second frequency, smaller than the first frequency.

13. The apparatus according to claim 12, wherein the processor is configured to set the first over-provisioning ratio to be larger than the second over-provisioning ratio.

14. The apparatus according to claim 12, wherein the processor is configured to assign the first region for storing frequently-changing data, and to assign the second region for storing rarely-changing data.

15. The apparatus according to claim 12, wherein the first region is used for storing a computer file that is known to change frequently.

16. The apparatus according to claim 15, wherein the processor is configured to detect storage locations of the non-volatile memory in which the computer file is stored.

17. The apparatus according to claim 11, wherein the processor is configured to assign the first region for storing parts of the data that are written sequentially, and to assign the second region for storing portions of the data that are written non-sequentially.

18. The apparatus according to claim 11, wherein the processor is configured to modify at least one of the first and second over-provisioning ratios over time.

19. The apparatus according to claim 11, wherein the processor is configured to choose the source memory blocks for compaction based on a selection criterion that equalizes wear of the non-volatile memory.

20. The apparatus according to claim 11, wherein the processor is configured to accept commands to store the data in logical addresses, to translate the logical addresses into respective physical storage locations in the non-volatile memory, to store the data in the physical storage locations, and to modify translation of the logical addresses into the physical storage locations based on a criterion that equalizes wear of the non-volatile memory.