Electronic device comprising a conductive structure and an insulating layer within a trench and a process of forming the same
First Claim
1. A process of forming an electronic device comprising:
- forming a semiconductor layer over a substrate, wherein the semiconductor layer has a primary surface and a thickness;
patterning the semiconductor layer to define a first trench extending through at least approximately 50% of the thickness of the semiconductor layer;
forming a first insulating layer within the first trench;
forming a vertically-oriented doped region within the semiconductor layer and extending from near the primary surface towards the substrate, wherein the vertically-oriented doped region is formed after patterning the semiconductor layer to define the first trench;
forming a first conductive structure within the first trench, wherein the first insulating layer is disposed between the semiconductor layer and the first conductive structure; and
forming a gate electrode, wherein substantially all of the gate electrode overlies the primary surface of the semiconductor layer.
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Accused Products
Abstract
An electronic device can include a semiconductor layer overlying a substrate and having a primary surface and a thickness, wherein a trench extends through at least approximately 50% of the thickness of semiconductor layer to a depth. The electronic device can further include a conductive structure within the trench, wherein the conductive structure extends at least approximately 50% of the depth of the trench. The electronic device can still further include a vertically-oriented doped region within the semiconductor layer adjacent to and electrically insulated from the conductive structure; and an insulating layer disposed between the vertically-oriented doped region and the conductive structure. A process of forming an electronic device can include patterning a semiconductor layer to define a trench extending through at least approximately 50% of the thickness of the semiconductor layer and forming a vertically-oriented doped region after patterning the semiconductor layer to define the trench.
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Citations
18 Claims
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1. A process of forming an electronic device comprising:
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forming a semiconductor layer over a substrate, wherein the semiconductor layer has a primary surface and a thickness; patterning the semiconductor layer to define a first trench extending through at least approximately 50% of the thickness of the semiconductor layer; forming a first insulating layer within the first trench; forming a vertically-oriented doped region within the semiconductor layer and extending from near the primary surface towards the substrate, wherein the vertically-oriented doped region is formed after patterning the semiconductor layer to define the first trench; forming a first conductive structure within the first trench, wherein the first insulating layer is disposed between the semiconductor layer and the first conductive structure; and forming a gate electrode, wherein substantially all of the gate electrode overlies the primary surface of the semiconductor layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A process of forming an electronic device comprising:
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forming a semiconductor layer over a substrate, wherein the semiconductor layer has a primary surface and a thickness; patterning the semiconductor layer to define a first trench extending through at least approximately 50% of the thickness of the semiconductor layer, wherein, other than rounding at a bottom of the first trench, the first trench has a substantially uniform width; forming a first insulating layer within the first trench; forming a vertically-oriented doped region within the semiconductor layer and extending from near the primary surface towards the substrate, wherein the vertically-oriented doped region is formed after patterning the semiconductor layer to define the first trench; and forming a first conductive structure within the first trench, wherein the first insulating layer is disposed between the semiconductor layer and the first conductive structure.
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18. A process of forming an electronic device comprising:
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forming a semiconductor layer over a substrate, wherein the semiconductor layer has a primary surface and a thickness; patterning the semiconductor layer to define a first trench extending through at least approximately 50% of the thickness of the semiconductor layer; forming a first insulating layer within the first trench; forming a vertically-oriented doped region within the semiconductor layer and extending from near the primary surface towards the substrate, wherein the vertically-oriented doped region is formed after patterning the semiconductor layer to define the first trench; and forming a first conductive structure within the first trench, wherein the first insulating layer is disposed between the semiconductor layer and the first conductive structure, and wherein forming the vertically-oriented doped region and forming the first conductive structure comprise; filling the first trench with a first conductive fill material; removing a portion, but not all, of the first conductive fill material; forming the vertically-oriented doped region after removing the portion of the first conductive fill material; and filling a second portion of the first trench with a second conductive fill material after forming the vertically-oriented doped region.
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Specification