Semiconductor device and method for manufacturing the same

• US 8,680,529 B2
• Filed: 05/03/2012
• Issued: 03/25/2014
• Est. Priority Date: 05/05/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kimura, Hajime
• Primary Examiner(s): Smith, Zandra
• Assistant Examiner(s): PATTON, PAUL E
• Application Number:
  US13/462,945
• Publication Number:
  US 20120280238A1
• Time in Patent Office: 691 Days
• Field of Search: 257/59, 257/43, 257/72, 257/71, 257/E21.413, 257/E29.291, 438/157
• US Class Current: 257/59
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 27/1262 with a particular formation, treatment or coating of the substrate
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/786 Thin film transistors, i.e. transistors with a channel being at least partly a thin film transistors having only the source or the drain region on an insulator layer H01L29/0653; thin film FinFETs H01L29/785
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]

Abstract

A semiconductor device includes a pixel electrode and a transistor which includes a first gate electrode, a first insulating layer over the first gate electrode, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a second gate electrode. The pixel electrode and the second gate electrode are provided over the second insulating layer. The first gate electrode has a region overlapping with the semiconductor layer with the first insulating layer provided therebetween. The second gate electrode has a region overlapping with the semiconductor layer with the second insulating layer provided therebetween. A first region is at least part of a region where the second gate electrode overlaps with the semiconductor layer. A second region is at least part of a region where the pixel electrode is provided. The second insulating layer is thinner in the first region than in the second region.

Claims

1. A semiconductor device comprising:

a first gate electrode;

a first insulating layer over the first gate electrode;

an oxide semiconductor layer over the first insulating layer, the oxide semiconductor layer including a crystal with c-axis alignment;

a second insulating layer over the oxide semiconductor layer, the second insulating layer including a first region and a second region thicker than the first region;

a second gate electrode over the second insulating layer; and

a pixel electrode over the second insulating layer,

wherein the first region overlaps with the first gate electrode, the oxide semiconductor layer, and the second gate electrode,

wherein the second region overlaps with the pixel electrode, and

wherein the second gate electrode is separated from the pixel electrode.

2. The semiconductor device according to claim 1, further comprising:

a first electrode; and

a second electrode,

wherein one of the first electrode and the second electrode is a source electrode, and

wherein the other of the first electrode and the second electrode is a drain electrode.

3. The semiconductor device according to claim 2, wherein the pixel electrode is electrically connected to one of the first electrode and the second electrode through an opening in the second insulating layer.

4. The semiconductor device according to claim 2, wherein each of the first electrode and the second electrode is provided under the oxide semiconductor layer.

5. The semiconductor device according to claim 2, wherein each of the first electrode and the second electrode is provided over the oxide semiconductor layer.

6. The semiconductor device according to claim 5, further comprising an insulating layer between the oxide semiconductor layer and each of the first electrode and the second electrode.

7. The semiconductor device according to claim 5, wherein the oxide semiconductor layer comprises a region thinner than a region overlapping with the first electrode or the second electrode.

8. The semiconductor device according to claim 1, wherein the second insulating layer comprises either one or both of a color filter and a black matrix.

21. The semiconductor device according to claim 1, further comprising a capacitor, wherein the pixel electrode functions as one of electrodes of the capacitor.

22. The semiconductor device according to claim 21, further comprising a third insulating layer between the oxide semiconductor layer and the second insulating layer,

wherein the capacitor includes a part of the third insulating layer, and

wherein the capacitor does not include the second insulating layer.

9. A semiconductor device comprising:

a transistor including;

a first gate electrode;

a first insulating layer over the first gate electrode;

an oxide semiconductor layer over the first insulating layer, the oxide semiconductor layer including a crystal with c-axis alignment;

a second insulating layer over the oxide semiconductor layer, and

a second gate electrode over the second insulating layer,

wherein the first gate electrode comprises a region overlapping with the oxide semiconductor layer with the first insulating layer provided therebetween, and

wherein the second gate electrode comprises a region overlapping with the oxide semiconductor layer with the second insulating layer provided therebetween; and

a pixel electrode over the second insulating layer,

wherein at least part of a region where the second gate electrode at least partly overlaps with at least part of the oxide semiconductor layer with part of the second insulating layer interposed therebetween is included in a first region,

wherein at least part of a region where the pixel electrode is provided over part of the second insulating layer is included in a second region,

wherein the second insulating layer is thinner in the first region than in the second region, and

wherein the second gate electrode is separated from the pixel electrode.

10. The semiconductor device according to claim 9,

wherein the transistor further includes a first electrode and a second electrode, and

wherein one of the first electrode and the second electrode is a source electrode, and the other of the first electrode and the second electrode is a drain electrode.

11. The semiconductor device according to claim 9, wherein the pixel electrode is electrically connected to the transistor through an opening in the second insulating layer.

12. The semiconductor device according to claim 10, wherein each or the first electrode and the second electrode is provided under the oxide semiconductor layer.

13. The semiconductor device according to claim 10, wherein each or the first electrode and the second electrode is provided over the oxide semiconductor layer.

14. The semiconductor device according to claim 13, further comprising an insulating layer between the oxide semiconductor layer and each of the first electrode and the second electrode.

15. The semiconductor device according to claim 13, wherein the oxide semiconductor layer comprises a region thinner than a region overlapping with the first electrode or the second electrode.

16. The semiconductor device according to claim 9, wherein the second insulating layer comprising either one or both a color filter and a black matrix.

23. The semiconductor device according to claim 9, further comprising a capacitor, wherein the pixel electrode functions as one of electrodes of the capacitor.

24. The semiconductor device according to claim 23, further comprising a third insulating layer between the oxide semiconductor layer and the second insulating layer,

wherein the capacitor includes a part of the third insulating layer, and

wherein the capacitor does not include the second insulating layer.

17. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first gate electrode over an insulating surface;

forming a first insulating layer over the first gate electrode;

forming an oxide semiconductor layer over the first insulating layer;

forming a second insulating layer including a first region and a second region thicker than the first region over the oxide semiconductor layer;

forming a conductive layer over the second insulating layer;

etching the conductive layer so that a second gate electrode and a pixel electrode are formed over the second insulating layer,

wherein the oxide semiconductor layer includes a crystal with c-axis alignment,

wherein the oxide semiconductor layer at least partly overlaps with at least part of the first gate electrode with the first insulating layer provided therebetween,

wherein the second gate electrode overlaps with at least part of the oxide semiconductor layer with the first region provided therebetween,

wherein the pixel electrode overlaps with at least part of the second region, and

wherein the second gate electrode is separated from the pixel electrode.

18. The method for manufacturing a semiconductor device, according to claim 17,

wherein a through hole is formed in the second insulating layer in the step of forming the second insulating layer, and

wherein the pixel electrode is in contact with a wiring under the pixel electrode or an electrode under the pixel electrode through the through hole.

19. The method for manufacturing a semiconductor device, according to claim 17, wherein the second insulating layer is formed using a half-tone mask.

20. The method for manufacturing a semiconductor device, according to claim 17, further comprising a step of forming a pair of electrodes over the oxide semiconductor layer before forming the second insulating layer.