Split trench-gate MOSFET with integrated Schottky diode

• US 8,680,614 B2
• Filed: 06/12/2012
• Issued: 03/25/2014
• Est. Priority Date: 06/12/2012
• Status: Active Grant

• Current Assignee: Monolithic Power Systems Incorporated
• Original Assignee: Monolithic Power Systems Incorporated
• Inventors: Li, Tiesheng, Ma, Rongyao, Zhang, Lei
• Primary Examiner(s): Le, Thao
• Assistant Examiner(s): DYKES, LAURA M
• Application Number:
  US13/494,572
• Publication Number:
  US 20130328122A1
• Time in Patent Office: 651 Days
• Field of Search: 257/334
• US Class Current: 257/334
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A split trench-gate MOSFET device and method for forming this device is disclosed. The device has a trench gate structure, comprising a shield electrode and two gate electrodes, wherein a substantial portion of shield electrode region is lower than the gate electrode region, and wherein a portion of the shield electrode region extends to the top surface between the two gate electrodes. The device further comprises a source metal layer, contacting to an initial layer, a well region, the shield electrode and a source region at the top surface, wherein the contact between the source metal layer and the initial layer forms a Schottky diode.

Claims

1. A semiconductor device, having a top surface and a bottom surface, the semiconductor device comprising:

a semiconductor initial layer, having a first conductivity type;

a well region, formed in a portion of the initial layer, the well region having a second conductivity type, and the well region comprising at least two well region portions, and wherein a section of the initial layer between the well region portions extends to the top surface of the semiconductor device;

a trench gate structure, comprising a shield electrode and two gate electrodes, wherein a substantial portion of the shield electrode is directly beneath the two gate electrodes, and wherein a section of the shield electrode between the two gate electrodes extends to the top surface;

a source region, formed in the well region, the source region adjacent to the trench gate structure, and the source region having the first conductivity type; and

a source metal layer, contacting the initial layer, the well region, the shield electrode and the source region at the top surface, wherein a contact between the source metal layer and the initial layer at the top surface forms a Schottky diode.

2. The semiconductor device according to claim 1, wherein the source metal layer fully contacts the section of the initial layer between the well region portions, the well region, the section of the shield electrode between the two gate electrodes, and the source region at the top surface.

3. The semiconductor device according to claim 1, wherein the trench gate structure further comprises an insulation material layer, wherein the side wall and the bottom of the trench gate structure are covered with the insulation material layer, and wherein the shield electrode and the two gate electrodes are isolated from each other by the insulation material layer.

4. The semiconductor device according to claim 1, wherein the semiconductor device comprises a continuous structure, wherein the continuous structure is duplicated along an extending orientation which is perpendicular to the trench gate structure in the horizontal plane, and wherein each of the respective trench gate structures is disposed between the corresponding two well regions along the extending orientation.

5. The semiconductor device according to claim 4, wherein each of the Schottky diodes is disposed between the corresponding two trench gate structures.

6. The semiconductor device according to claim 1, wherein the Schottky diode is disposed between the two well region portions.

7. The semiconductor device according to claim 1, wherein the well region portions abut an anode of the Schottky diode.

8. The semiconductor device according to claim 1, wherein the shield electrode and the gate electrodes comprise poly-silicon.

9. The semiconductor device according to claim 1, wherein the two gates are serially arranged along with the horizontally extending direction of the trench gate structure.

10. A semiconductor device, having a top surface, comprising:

a split trench-gate metal-oxide semiconductor field effect transistor (MOSFET), comprising a drain region, a source region, a body region, a split trench-gate structure and a source metal layer, wherein the split trench gate structure having a shield electrode and two gate electrodes, wherein a substantial portion of the shield electrode is directly beneath the two gate electrodes, and wherein a section of the shield electrode between the two gate electrodes extends to the top surface of the device, and wherein the source metal layer contacts the source region, the body region and the shield electrode at the top surface; and

a Schottky diode, formed next to the trench-gate MOSFET, wherein an anode of the Schottky diode is comprised by a portion of the source metal layer.

11. The semiconductor device according to claim 10, having a continuous structure, wherein the continuous structure is duplicated along an extending orientation, wherein the extending orientation is perpendicular to the split trench gate structure in horizontal plane, and wherein each of the split trench gate structure is disposed between two adjacent well regions along the extending orientation.

12. The semiconductor device according to claim 11, wherein the body region comprises two body region portions, wherein the Schottky diode is disposed between two body region portions perpendicular to the extending orientation in horizontal plane, and wherein the Schottky diode is between two trench gate structures along the extending orientation.

13. The semiconductor device according to claim 12, wherein the trench gate structure further comprises an insulation material layer, wherein the side wall and the bottom of the split trench-gate structure are covered with the insulation material layer, and wherein the shield electrode and the two gate electrodes are isolated from each other by the insulation material layer.

14. The semiconductor device according to claim 10, wherein the two gates are serially arranged along with the horizontally extending direction of the split trench gate structure.

15. A method of forming a semiconductor device, comprising:

forming a semiconductor initial layer, wherein the initial layer having a first conductivity type and having a top side and a bottom side, and wherein the top side serves as a top surface of the device, and the bottom side side serves as a bottom surface of the device;

forming a well region comprising at least two well region portions in the semiconductor initial layer, wherein a portion of the semiconductor initial layer is between the well region portions at the top surface;

forming a trench gate structure which stretches through the well region and into the semiconductor initial layer, wherein the trench gate structure has a shield electrode and two gate electrodes, wherein a substantial portion of the shield electrode is directly beneath the gate electrodes, and wherein the other portion of the shield electrode extends to the top surface of the device between the two gate electrodes;

forming a source region in the well region proximate the trench gate structure; and

forming a source metal layer contacting the initial layer, the well region, the source region and the shield electrode at the top surface wherein forming the contact between the source metal layer and the initial layer forms a Schottky diode.

16. The method of forming a semiconductor device according to claim 15, wherein forming a trench gate structure comprises:

forming a trench;

forming a first insulation layer on the bottom and the side wall of the trench;

forming a shield electrode layer on the first insulation layer;

removing a portion of the shield electrode layer from the top surface to form a shield electrode, wherein the thickness of the removed area is smaller than the thickness of the shield electrode layer and larger than the thickness of the well regions;

forming a second insulation layer on the shield electrode; and

forming two gate electrodes on the second insulation layer.

17. The method of forming a semiconductor device according to claim 15, wherein forming the well regions is after forming the trench gate structure.

18. The method of forming a semiconductor device according to claim 17, wherein forming the source regions is through self-align implantation after forming the trench gate structure.

19. The method of forming a semiconductor device according to claim 15, wherein forming the well regions is through self-align implantation after forming the trench gate structure.

20. The method of forming semiconductor device according to claim 15, wherein forming the source metal layer comprises forming a metal layer fully contacting the initial layer, the well region, the source region and the shield electrode at the top surface of the device.

21. The method of forming a semiconductor device according to claim 15, wherein forming a source metal layer comprises:

forming a dielectric layer on the initial layer, the well region, the source region and the shield electrode at the top surface;

creating vias on the dielectric layer; and

forming a metal layer on the dielectric layer, wherein the metal layer is connected to the initial layer, the well region, the source region and the shield electrode through the vias.

22. The method of forming a semiconductor device according to claim 15, wherein forming the well region comprises forming a well region abutting an anode of the Schottky diode.