Programmable power supervisor

• US 8,680,902 B1
• Filed: 09/11/2012
• Issued: 03/25/2014
• Est. Priority Date: 03/12/2007
• Status: Active Grant

• Current Assignee: Tamiras Per Pte Ltd LLC (Intellectual Ventures LLC)
• Original Assignee: Luciano Processing LLC (Intellectual Ventures LLC)
• Inventors: Wright, David G.
• Primary Examiner(s): Hernandez, William
• Application Number:
  US13/610,623
• Time in Patent Office: 560 Days
• Field of Search: 327/142, 327/143, 327/198
• US Class Current: 327/143
• CPC Class Codes: G05F 1/10 Regulating voltage or current G05F1/02 takes precedence; for electric railways B60M3/02
• CPC Class Codes: G05F 1/46 wherein the variable actually regulated by the final control device is dc G05F1/625 takes precedence
• CPC Class Codes: G06F 1/24 Resetting means
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H02M 1/08 Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• CPC Class Codes: H03L 5/02 of power
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A programmable power-on reset circuit in accordance with one embodiment of the invention can include a programmable voltage divider. The programmable power-on reset circuit can also include a comparator that is coupled to the programmable voltage divider and that is coupled to receive a reference voltage. Additionally, the programmable power-on reset circuit can include a non-volatile memory that is coupled to the programmable voltage divider, wherein the non-volatile memory can be coupled to receive programming for controlling an output of the programmable voltage divider.

Claims

1. A programmable power-on reset circuit comprising:

a programmable voltage divider;

a comparator coupled to the programmable voltage divider and coupled to receive a reference voltage;

a non-volatile memory coupled to the programmable voltage divider, wherein the non-volatile memory is configured to receive programming for controlling an output of the programmable voltage divider; and

a delay module coupled to the comparator and the non-volatile memory, wherein the programming is configured to set a delay period of the delay module.

2. The programmable power-on reset circuit of claim 1, wherein the programming is further configured to set a voltage threshold for the programmable power-on reset circuit.

3. The programmable power-on reset circuit of claim 1, further comprising:

a glitch detection module coupled to the comparator and the non-volatile memory.

4. The programmable power-on reset circuit of claim 3, wherein the programming is further configured to set a glitch detection interval for the glitch detection module.

5. The programmable power-on reset circuit of claim 1, wherein the programming is further configured to change the value of a previously programmed voltage threshold for the programmable power-on reset circuit.

6. A programmable power-on reset circuit comprising:

a programmable voltage divider;

a comparator coupled to the programmable voltage divider and configured to receive a reference voltage; and

a processing element coupled to the programmable voltage divider, wherein the processing element is configured to receive programming for controlling an output of the programmable voltage divider, wherein the processing element is further configured to generate a reset signal, and wherein the programming is configured to set a delay period implemented by the processing element in generating the reset signal.

7. The programmable power-on reset circuit of claim 6, wherein the programming is further configured to set a voltage threshold for the programmable power-on reset circuit.

8. The programmable power-on reset circuit of claim 6, further comprising:

a non-volatile memory coupled to the processing element, wherein the non-volatile memory is configured to store the programming.

9. The programmable power-on reset circuit of claim 6, wherein the programming is further configured to set a glitch detection interval implemented by the processing element.

10. The programmable power-on reset circuit of claim 6, wherein the programming is further configured to change the value of a previously programmed voltage threshold for the programmable power-on reset circuit.

11. The programmable power-on reset circuit of claim 6, wherein the processing element is further coupled to the comparator.

12. A method comprising:

receiving an input voltage;

storing programming data within non-volatile memory, wherein the programming data is configured to set a threshold reference voltage; and

outputting a reset signal in response to the input voltage falling below the threshold reference voltage, wherein the programming data is further configured to set a delay period associated with outputting the reset signal.

13. The method of claim 12, wherein said outputting a reset signal is performed by a programmable power-on reset circuit.

14. The method of claim 12, wherein the programming data is further configured to set a glitch rejection period associated with said outputting a reset signal.

15. The method of claim 12, further comprising:

utilizing a reference voltage to determine if the input voltage falls below the threshold reference voltage.