Capacitive sensing with programmable logic for touch sense arrays

• US 8,681,122 B2
• Filed: 09/28/2011
• Issued: 03/25/2014
• Est. Priority Date: 04/19/2011
• Status: Active Grant

• Current Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Maharyta, Andriy, Sharamaga, Roman, Konovalov, Anton, Kremin, Viktor, Yarosh, Andriy, OGIRKO, ROMAN, Pirogov, Oleksandr, Mohammed, Haneef
• Primary Examiner(s): Cheng, Joe H
• Application Number:
  US13/247,331
• Publication Number:
  US 20120268416A1
• Time in Patent Office: 909 Days
• Field of Search: 345/156, 345/173, 345/174, 345/179, 178/18.06, 178/19.03, 326/38, 326/41, 326/47, 710/18, 710/266
• US Class Current: 345/174
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes

Abstract

A touch sense controller configured to be coupled to a touch sense array is disclosed. The touch sense controller includes programmable logic that includes programmable logic elements configured to manage measurement of capacitance associated with the touch sense array.

Claims

1. A circuit comprising

a touch sense controller configured to be coupled to a touch sense array, wherein the touch sense controller comprises:

programmable logic comprising a plurality of programmable logic elements configured to manage measurement of capacitance associated with the touch sense array, wherein the programmable logic is configured as a programmable sequencer that is a hardware-controlled scanning thread to scan the touch sense array without interaction of a processing core of the touch sense controller.

2. The circuit of claim 1, wherein the plurality of programmable logic elements comprises a plurality of universal digital logic blocks (UDB) of the touch sense controller.

3. The circuit of claim 1, wherein the programmable sequencer comprises a run-time reconfigurable state machine.

4. The circuit of claim 1, wherein the plurality of programmable logic elements comprises an RX slots control sequencer block configured to selectively enable or disable receiver (RX) measurement channels to take part in a conversion.

5. The circuit of claim 1, wherein the plurality of programmable logic elements comprises a transmit (TX) pins control sequencer block configured to apply TX excitation signals to TX pins.

6. The circuit of claim 5, wherein the TX pins control sequencer block is configured to apply one of single-TX and multiphase-TX excitation signals having a programmable phase pattern and common TX signal state.

7. The circuit of claim 1, wherein the plurality of programmable logic elements comprises an analog-to-digital converter control sequencer block configured to measure a value proportional to a mutual capacitance created by a TX-RX intersection.

8. The circuit of claim 1, wherein the programmable logic is configured to apply transmit (TX) signals on TX pins and receive (RX) signals on RX pins without interaction of the processing core of the touch sense controller.

9. The circuit of claim 1, wherein the programmable logic is reconfigurable during system boot time according to properties of the touch sense array.

10. A circuit comprising

a touch sense controller configured to be coupled to a touch sense array, wherein the touch sense controller comprises

programmable logic comprising a plurality of programmable logic elements configured to manage measurement of capacitance associated with the touch sense array, wherein the programmable logic is configured to apply transmit (TX) signals on TX pins and receive (RX) signals on RX pins without interaction of a processing core of the touch sense controller.

11. The circuit of claim 10, wherein the programmable logic is configured to notify the processing core when a full panel scan is completed via an interrupt.

12. The circuit of claim 10, wherein the programmable logic is configured to begin a full panel scan in response to a start-of-scan signal received from the processing core.

13. A circuit comprising

a touch sense controller configured to be coupled to a touch sense array, wherein the touch sense controller comprises

programmable logic comprising a plurality of programmable logic elements configured to manage measurement of capacitance associated with the touch sense array, wherein the programmable logic is reconfigurable during system boot time according to properties of the touch sense array.

14. A circuit comprising

a touch sense controller configured to be coupled to a touch sense array, wherein the touch sense controller comprises

programmable logic comprising a plurality of programmable logic elements configured to manage measurement of capacitance associated with the touch sense array, wherein the programmable logic is configured to perform an adaptive scanning algorithm.

15. A method, comprising:

programming programmable logic comprising a plurality of programmable logic elements configured to manage measurement of capacitance associated with a touch sense array; and

reconfiguring or reprogramming the programmable logic during system boot time or system run time according to properties of the touch sense array.